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12227 Commits

Author SHA1 Message Date
Chris Lattner
9f51967a78 Remove a 'using namespace std'. 
llvm-svn: 25059
 2006-01-01 22:20:31 +00:00
Andrew Lenharth
8291285388 Add support for brcond 
llvm-svn: 25058
 2006-01-01 22:16:43 +00:00
Andrew Lenharth
33a683c939 Move brcond over and fix some imm patterns. This may be the last change before changing the default alpha isel. 
llvm-svn: 25057
 2006-01-01 22:16:14 +00:00
Andrew Lenharth
1f84cd6920 clean this function up some 
llvm-svn: 25055
 2006-01-01 22:13:54 +00:00
Chris Lattner
a04fb40243 Patch #1 of Saem Ghani's Pass Manager refactoring. From the man: 
"All this should do is create what will eventually be the specialised
passmanagers.  Currently, the templates are inheriting them, once the
template specialisations' methods have been absorbed, patches
submitted method by method.  I'll nuke the specialisations and have
the new objects inherit directly from passmanagert, and sanitise the
world of all references to templates.
"

llvm-svn: 25053
 2005-12-30 20:00:46 +00:00
Andrew Lenharth
3441657fb4 improve constant loading. Still sucks, but oh well 
llvm-svn: 25047
 2005-12-30 02:30:02 +00:00
Nate Begeman
ec7c28a28c Add support for generating v4i32 altivec code 
llvm-svn: 25046
 2005-12-30 00:12:56 +00:00
Nate Begeman
e1fdcf5a20 Remove a fixme 
llvm-svn: 25045
 2005-12-30 00:11:07 +00:00
Nate Begeman
25fe5b2b76 Make sure to pass the offset into the new node, so that we don't silently 
drop it on the floor.

llvm-svn: 25044
 2005-12-30 00:10:38 +00:00
Duraid Madina
b9197e021f purity++ 
llvm-svn: 25041
 2005-12-29 05:59:19 +00:00
Andrew Lenharth
13a01d794b let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean 
llvm-svn: 25040
 2005-12-29 01:06:12 +00:00
Andrew Lenharth
b87ac716bc Fix up immediate handling 
llvm-svn: 25039
 2005-12-29 00:50:08 +00:00
Duraid Madina
32783dc8d0 add these so I can be less naughty 
llvm-svn: 25034
 2005-12-28 06:29:02 +00:00
Duraid Madina
f8a342aa4f HB is *the* code janitor. 
llvm-svn: 25031
 2005-12-28 04:55:42 +00:00
Duraid Madina
2d0894bdca mixed-STL programs are big and nasty :( 
llvm-svn: 25030
 2005-12-28 02:44:35 +00:00
Duraid Madina
ad3a82e21c yet more C++ standards-compliance stuff. 
llvm-svn: 25028
 2005-12-27 10:40:34 +00:00
Duraid Madina
2ea271c8bf nasty paste-o, calls passing more than 8 arguments along were having 
args >8 put into the wrong place

llvm-svn: 25027
 2005-12-27 10:17:03 +00:00
Andrew Lenharth
bea3ab432b Restore some happiness to the JIT 
llvm-svn: 25026
 2005-12-27 06:25:50 +00:00
Andrew Lenharth
b48bdd4aae Fix alpha regressions. 
llvm-svn: 25025
 2005-12-27 03:53:58 +00:00
Chris Lattner
cee6093ca8 Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc 
llvm-svn: 25024
 2005-12-27 03:02:18 +00:00
Duraid Madina
17ba7a7eae more C++ daintiness 
llvm-svn: 25023
 2005-12-26 14:31:26 +00:00
Duraid Madina
2d7d85ca13 I bet pinski knows why g++ accepts this stuff 
llvm-svn: 25022
 2005-12-26 14:23:22 +00:00
Duraid Madina
7cb522e3e8 getting there... 
llvm-svn: 25021
 2005-12-26 13:48:44 +00:00
Duraid Madina
c3f59ae4fb dum de dum 
llvm-svn: 25018
 2005-12-26 10:24:15 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Duraid Madina
07a3df77d0 more HP-UX cleanliness 
llvm-svn: 25015
 2005-12-26 08:35:06 +00:00
Duraid Madina
210d54c990 HP aCC chokes on this, but it's not required anyway: according to 
the bzip2 homepage, only ancient (gcc 2.7.x ?) versions of GCC
require this? It certainly isn't needed for the current bzip2
sources.

llvm-svn: 25013
 2005-12-26 05:00:25 +00:00
Duraid Madina
392483ef73 MERRY CHRISTMAS EVERYONE!!! (what better way to spend christmas than 
to try building LLVM on HP-UX! (the Right Way seems to be to tear out
the ancient STL that HP ship and use http://incubator.apache.org/stdcxx/ )

llvm-svn: 25012
 2005-12-26 04:56:16 +00:00
Andrew Lenharth
f8a6d19367 add br pattern, unify JSR and BSR ISel instrs, and add BSR support for DAG 
llvm-svn: 25011
 2005-12-25 17:36:48 +00:00
Duraid Madina
303d3f1f96 unbreak calls, a few more tests should run. Tomorrow: bugpoint! 
llvm-svn: 25010
 2005-12-25 14:09:08 +00:00
Duraid Madina
00fbe7a7e4 we don't feed our call instructions extra operands 
llvm-svn: 25009
 2005-12-25 14:07:01 +00:00
Andrew Lenharth
9e8f45d185 All that just to lower div and rem 
llvm-svn: 25008
 2005-12-25 01:34:27 +00:00
Andrew Lenharth
a639cb7176 allow custom lowering to return null for legal results 
llvm-svn: 25007
 2005-12-25 01:07:37 +00:00
Andrew Lenharth
5cf1fcb844 Support Custom lowering of a few more operations. 
Alpha needs to custom lower *DIV and *REM

llvm-svn: 25006
 2005-12-24 23:42:32 +00:00
Andrew Lenharth
b42cc57048 support targetexternalsym 
llvm-svn: 25005
 2005-12-24 23:36:59 +00:00
Evan Cheng
cd69c81c5e Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass. 
llvm-svn: 25004
 2005-12-24 09:48:35 +00:00
Andrew Lenharth
1e6795bc0c All addressing modes are now exposed. The only remaining relocated forms 
are for function prologue.

TODO: move external symbols over to using RelLit.
    : have a pattern that matches constpool|globaladdr
    : have a pattern that matches (add x imm) -> x, imm or (...) -> ..., 0
llvm-svn: 25003
 2005-12-24 08:29:32 +00:00
Andrew Lenharth
588bd3f659 Unify the patterns for loads and stores. Now offset addressing should be 
supported.  This almost completes memory operations.

llvm-svn: 25002
 2005-12-24 07:34:33 +00:00
Andrew Lenharth
f4c74093bb Let's see if we can break things. 
Lower GOT relative addresses to Lo and HI.
Update both ISels to select them when they can.
Saves instructions here and there.

llvm-svn: 25001
 2005-12-24 05:36:33 +00:00
Andrew Lenharth
5ce2a6c2cf move loads and stores over. Smart addr selection comming 
llvm-svn: 25000
 2005-12-24 03:41:56 +00:00
Nate Begeman
96c7e22231 Fix one of the things in the todo file, and get a bit closer to folding 
constant offsets from statics into the address arithmetic.

llvm-svn: 24999
 2005-12-24 01:00:15 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Jim Laskey
d8cc1062ed Remove redundant debug locations. 
llvm-svn: 24995
 2005-12-23 20:08:28 +00:00
Chris Lattner
c97655052a unbreak the build :-/ 
llvm-svn: 24992
 2005-12-23 16:12:20 +00:00
Chris Lattner
738cec7a6e not a good idea 
llvm-svn: 24991
 2005-12-23 07:37:47 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns. 
llvm-svn: 24990
 2005-12-23 07:31:11 +00:00
Evan Cheng
74cf3e8823 Operand 1 of TRUNCSTORE can be any of integer and floating point types. 
llvm-svn: 24989
 2005-12-23 07:30:30 +00:00
Evan Cheng
bcfef42cd4 Allow custom lowering of LOAD, EXTLOAD, ZEXTLOAD, STORE, and TRUNCSTORE. Not 
currently used.

llvm-svn: 24988
 2005-12-23 07:29:34 +00:00
Chris Lattner
2e386f9d46 fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc remove benchmark list, remove issues addressed by the dag-dag isel 
llvm-svn: 24984
 2005-12-23 06:09:30 +00:00
Chris Lattner
0637d38ec2 Simplify store(bitconv(x)) to store(x). This allows us to compile this: 
void bar(double Y, double *X) {
  *X = Y;
}

to this:

bar:
        save -96, %o6, %o6
        st %i1, [%i2+4]
        st %i0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std  %f0, [%i2]
        restore %g0, %g0, %g0
        retl
        nop

on sparcv8.

llvm-svn: 24983
 2005-12-23 05:48:07 +00:00
Chris Lattner
20e6338732 fold (conv (load x)) -> (load (conv*)x). 
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }

To this:

bar:
        save -96, %o6, %o6
        ld [%i0+4], %o1
        ld [%i0], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -104, %o6, %o6
        ldd [%i0], %f0
        std %f0, [%i6+-8]
        ld [%i6+-4], %o1
        ld [%i6+-8], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on SparcV8.

llvm-svn: 24982
 2005-12-23 05:44:41 +00:00
Chris Lattner
28887b3ca6 Fold bitconv(bitconv(x)) -> x. We now compile this: 
void foo(double);
void bar(double X) { foo(X); }

to this:

bar:
        save -96, %o6, %o6
        or %g0, %i0, %o0
        or %g0, %i1, %o1
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

bar:
        save -112, %o6, %o6
        st %i1, [%i6+-4]
        st %i0, [%i6+-8]
        ldd [%i6+-8], %f0
        std %f0, [%i6+-16]
        ld [%i6+-12], %o1
        ld [%i6+-16], %o0
        call foo
        nop
        restore %g0, %g0, %g0
        retl
        nop

on V8.

llvm-svn: 24981
 2005-12-23 05:37:50 +00:00
Chris Lattner
9ee4ecfe74 constant fold bits_convert in getNode and in the dag combiner for fp<->int 
conversions.  This allows V8 to compiles this:

void %test() {
        call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
        ret void
}

into:

test:
        save -96, %o6, %o6
        sethi 0, %o3
        sethi 1049088, %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        or %g0, %o3, %o4
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

instead of:

test:
        save -112, %o6, %o6
        sethi 0, %o4
        sethi 1049088, %l0
        st %o4, [%i6+-12]
        st %l0, [%i6+-16]
        ld [%i6+-12], %o3
        ld [%i6+-16], %o2
        sethi 1048576, %o1
        sethi 1040384, %o0
        call test2
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24980
 2005-12-23 05:30:37 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded 
llvm-svn: 24979
 2005-12-23 05:15:23 +00:00
Chris Lattner
8b2bd265f4 make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7 Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Chris Lattner
3c4a3dd86e Simplify some code by using BIT_CONVERT 
llvm-svn: 24974
 2005-12-23 00:59:59 +00:00
Chris Lattner
4bcbe2d378 Fix a pasto 
llvm-svn: 24973
 2005-12-23 00:52:30 +00:00
Chris Lattner
4a929edf04 fix a thinko in the bit_convert handling code 
llvm-svn: 24972
 2005-12-23 00:50:25 +00:00
Chris Lattner
a59cc5ebbb add very simple support for the BIT_CONVERT node 
llvm-svn: 24970
 2005-12-23 00:16:34 +00:00
Reid Spencer
63a1f99627 Revert previous patch. Additional tests fail. 
llvm-svn: 24968
 2005-12-22 21:46:37 +00:00
Chris Lattner
1cbff1f3cd clean up .td file by using evan's new FLAG thing 
llvm-svn: 24967
 2005-12-22 21:18:39 +00:00
Chris Lattner
73f38507d9 remove dead code 
llvm-svn: 24965
 2005-12-22 21:16:08 +00:00
Chris Lattner
8c2622a14e fix handling of weak linkage 
llvm-svn: 24964
 2005-12-22 21:15:17 +00:00
Reid Spencer
56825ced86 Fix PR409: 
Implement the suggested check to ensure that out-of-range float constants
don't get accepted by LLVM accidentally. Adjust the supporting test cases
as well.

llvm-svn: 24963
 2005-12-22 21:07:29 +00:00
Reid Spencer
5086a114a5 For PR351: 
* Allow the ExecuteAndWait to return negative values if a signal is
  detected as the reason for the child termination. This is needed to
  support bugpoint detecting bad things in its child processes.

llvm-svn: 24960
 2005-12-22 20:00:16 +00:00
Chris Lattner
f7ed832fcf move some random notes out of my email into someplace useful 
llvm-svn: 24956
 2005-12-22 17:19:28 +00:00
Duraid Madina
e009e40008 this is a hack, which may or may not hang around. In short: 
whimper out of doing things the Right Way, and hack up a generic
'BRCALL' instruction, that gets generated when calls are lowered.
This gets selected by hand in the DAG isel, where it gets turned
into real (i.e. in tablegen) br.call instructions.

BUG: this dies on void calls, but seems to work otherwise?
llvm-svn: 24952
 2005-12-22 13:29:14 +00:00
Duraid Madina
325c2cc07b we can't do this directly in lowering, so we need this case 
llvm-svn: 24951
 2005-12-22 07:14:45 +00:00
Duraid Madina
bf2a5de0d5 oops, back this out 
llvm-svn: 24950
 2005-12-22 07:13:51 +00:00
Duraid Madina
d87738a097 we can't all have brains now, can we 
llvm-svn: 24948
 2005-12-22 06:41:39 +00:00
Duraid Madina
b43dc0ff5b this should take care of calls to varadic functions, but it doesn.,t 
BUG: calling printf(string, float) will load the float into the wrong
register, completely forget about loading the string, etce

llvm-svn: 24947
 2005-12-22 06:39:57 +00:00
Duraid Madina
d1c9d5ae4d we need to emit the getf.d instruction in lowering, so add it 
to IA64ISD

llvm-svn: 24946
 2005-12-22 06:38:38 +00:00
Chris Lattner
7f45e655a8 Separate the call graph implementation from its interface. This implements 
the rough idea sketched out in http://nondot.org/sabre/LLVMNotes/CallGraphClass.txt,
allowing new spiffy implementations of the callgraph interface to be built.

Many thanks to Saem Ghani for contributing this!

llvm-svn: 24944
 2005-12-22 06:07:52 +00:00
Chris Lattner
6f708e886f The 81st column doesn't like code in it. 
llvm-svn: 24943
 2005-12-22 05:23:45 +00:00
Duraid Madina
47cd4eeab0 I shoulda done this a *long* time ago (tm): implement calls properly, 
i.e. r1/r12/rp are saved/restored regardless of scheduling/luck

TODO: calls to external symbols, indirect (function descriptor) calls,
      performance (we're being paranoid right now)

BUG: the code for handling calls to vararg functions breaks if FP
args are passed (this will make printf() go haywire so a bunch of
tests will fail)

BUG: this seems to trigger some legalize nastiness
llvm-svn: 24942
 2005-12-22 04:07:40 +00:00
Duraid Madina
22eb8a3fb4 kill SelectCALL() in the DAG isel, we handle this in lowering now, like 
SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about
ISD::CALL/TAILCALL)

llvm-svn: 24941
 2005-12-22 03:58:17 +00:00
Duraid Madina
2c940da498 update tablegen files - nothing to see here 
llvm-svn: 24939
 2005-12-22 03:56:03 +00:00
Reid Spencer
d7c85dc01c For PR351: 
Move the system dependent portion to lib/System/*/Alarm.inc. This makes the
SlowOperationInformer platform independent.

llvm-svn: 24938
 2005-12-22 03:31:26 +00:00
Reid Spencer
94bbff0319 Implement a generic polled Alarm function. This merely removes the system 
dependent portion of the lib/Support/SlowOperationTimer code into the
lib/System implementation where it can be ported to different platforms.

llvm-svn: 24937
 2005-12-22 03:23:46 +00:00
Evan Cheng
e458553c73 Bye bye HACKTROCITY. 
llvm-svn: 24935
 2005-12-22 02:26:21 +00:00
Evan Cheng
eac312f453 Added special flag node FLAG. 
llvm-svn: 24934
 2005-12-22 02:25:14 +00:00
Reid Spencer
b7a51183c1 Add an eol at the end to shut gcc sup. 
llvm-svn: 24926
 2005-12-22 01:41:00 +00:00
Evan Cheng
d33f8fde4a Lefted out TargetLowering:: 
llvm-svn: 24922
 2005-12-21 23:14:54 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
 2005-12-21 23:05:39 +00:00
Evan Cheng
add305de26 Oops. Accidentally deleted RET pattern. It's still needed for return void; 
llvm-svn: 24920
 2005-12-21 22:22:16 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
 2005-12-21 20:21:51 +00:00
Jim Laskey
aeb774e97d Start of Dwarf framework. 
llvm-svn: 24914
 2005-12-21 19:48:16 +00:00
Chris Lattner
6364b03742 make sure to relegalize all cases 
llvm-svn: 24911
 2005-12-21 19:40:42 +00:00
Chris Lattner
079443691c enable the gep isel opt 
llvm-svn: 24910
 2005-12-21 19:36:36 +00:00
Chris Lattner
39a4b7dc7c Regenerate 
llvm-svn: 24908
 2005-12-21 18:31:50 +00:00
Chris Lattner
2c88f52eb3 allow logical operators on packed integral types 
llvm-svn: 24907
 2005-12-21 18:31:29 +00:00
Chris Lattner
d51de8d76f Get logical operations to like packed types, allow BinOp::getNot to create 
the right vector of -1's as its operand.

llvm-svn: 24906
 2005-12-21 18:22:19 +00:00
Chris Lattner
15bf8f26f2 fix a bug I introduced that broke recursive expansion of nodes (e.g. scalarizing vectors) 
llvm-svn: 24905
 2005-12-21 18:02:52 +00:00
Chris Lattner
025b8b82de regenerate 
llvm-svn: 24904
 2005-12-21 17:53:23 +00:00
Chris Lattner
4ca5857a7c Implement Regression/Assembler/2005-12-21-ZeroInitVector.ll 
llvm-svn: 24903
 2005-12-21 17:53:02 +00:00
Chris Lattner
2bc611f6f0 add some nodes, forgot to commit this last night :( 
llvm-svn: 24901
 2005-12-21 16:22:46 +00:00
Chris Lattner
347c6eedae This was meant to go in 
llvm-svn: 24900
 2005-12-21 07:50:26 +00:00
Chris Lattner
884def40f4 Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patterns 
that were overloaded to work before and after the stackifier runs.  With the
new clean world, it is possible to write patterns for these instructions: woo!

This also adds a few simple patterns here and there, though there are a lot
still missing.  These should be easy to add though. :)

See the comments under "Floating Point Stack Support" for more details on
the new world order.

This patch as absolutely no effect on the generated code, woo!

llvm-svn: 24899
 2005-12-21 07:47:04 +00:00
Chris Lattner
ee15b5393f Wrap some long lines: no functionality change 
llvm-svn: 24898
 2005-12-21 05:34:58 +00:00
Chris Lattner
39b72c3525 remove dead code 
llvm-svn: 24896
 2005-12-21 05:27:51 +00:00
Chris Lattner
a7d3498167 Lower ConstantAggregateZero into zeros 
llvm-svn: 24890
 2005-12-21 02:43:26 +00:00
Evan Cheng
cab6710034 Remove ISD::RET select code. Now tblgen'd. 
llvm-svn: 24889
 2005-12-21 02:41:57 +00:00
Evan Cheng
0226113ed5 * Added lowering hook for external weak global address. It inserts a load 
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.

llvm-svn: 24888
 2005-12-21 02:39:21 +00:00
Chris Lattner
e62133e3c6 Don't emit a null terminator, nor anything after it, to the ctor/dtor list 
llvm-svn: 24887
 2005-12-21 01:17:37 +00:00
Evan Cheng
ace8f1fafa SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns. 
llvm-svn: 24886
 2005-12-20 22:59:51 +00:00
Evan Cheng
05ad906ccf Flip the meaning of FPContractions to reflect Requires<[]> change. 
llvm-svn: 24884
 2005-12-20 20:08:53 +00:00
Chris Lattner
338c0b2011 Run lower-switch after lower-invoke. 
Only run lower-allocations and lower-select for the simple isel

llvm-svn: 24881
 2005-12-20 08:00:11 +00:00
Chris Lattner
ec177e242d Reserve G1 for frame offset stuff and use it to handle large stack frames. 
For example, instead of emitting this:

test:
        save -40112, %o6, %o6   ;; imm too large
        add %i6, -40016, %o0    ;; imm too large
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

emit this:

test:
        sethi 4194264, %g1
        or %g1, 848, %g1
        save %o6, %g1, %o6
        sethi 4194264, %g1
        add %g1, %i6, %g1
        add %i1, 944, %o0
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

which doesn't cause the assembler to barf.

llvm-svn: 24880
 2005-12-20 07:56:31 +00:00
Evan Cheng
1c3ea75ffc Added X86 readport patterns. 
llvm-svn: 24879
 2005-12-20 07:38:38 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes. 
llvm-svn: 24877
 2005-12-20 06:22:03 +00:00
Chris Lattner
088b3ccdcc Fix a nasty latent bug in the legalizer that was triggered by my patch 
last night, breaking crafty and twolf.  Make sure that the newly found
legal nodes are themselves not re-legalized until the next iteration.

Also, since this functionality exists now, we can reduce number of legalizer
iterations by depending on this behavior instead of having to misuse 'do
another iteration' to get the same effect.

llvm-svn: 24875
 2005-12-20 00:53:54 +00:00
Nate Begeman
a114534620 Pattern-match return. Includes gross hack! 
llvm-svn: 24874
 2005-12-20 00:26:01 +00:00
Nate Begeman
d4562971b3 Fix a couple of the FIXMEs, thanks to suggestion from Chris. This allows 
us to load and store vectors directly at a pointer (offset of zero) by
using r0 as the base register.  This also requires some asm printer work
to satisfy the darwin assembler.

For
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = add <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

We now produce:
_foo:
        lvx v0, 0, r3
        vaddfp v0, v0, v0
        stvx v0, 0, r3
        blr

Instead of:
_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24872
 2005-12-19 23:40:42 +00:00
Nate Begeman
9c7dce88b5 Convert load/store over to being pattern matched 
llvm-svn: 24871
 2005-12-19 23:25:09 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support. 
llvm-svn: 24870
 2005-12-19 23:12:38 +00:00
Evan Cheng
503d37094f Print out opcode number if it's an unknown target node. 
llvm-svn: 24869
 2005-12-19 23:11:49 +00:00
Evan Cheng
c87099506c It's essential we clear CodeGenMap after isel every basic block! 
llvm-svn: 24867
 2005-12-19 22:36:02 +00:00
Chris Lattner
91987b5c3c Fix a case where the DAG Combiner would accidentally CSE flag-producing nodes, 
creating graphs that cannot be scheduled.

llvm-svn: 24866
 2005-12-19 22:21:21 +00:00
John Criswell
48bcd84894 Prefix DSA specific options with dsa. 
Make the dsa-alloc-list and dsa-free-list options hidden.

llvm-svn: 24864
 2005-12-19 20:14:38 +00:00
John Criswell
79deec95cc Added an option to specify the names of heap freeing functions. 
llvm-svn: 24863
 2005-12-19 19:54:23 +00:00
John Criswell
1e3346ebd3 Added a command line option that allows the user to specify a list of 
functions that allocate memory.

llvm-svn: 24862
 2005-12-19 17:38:39 +00:00
Jim Laskey
2f4c62c51a Amend comment. 
llvm-svn: 24861
 2005-12-19 16:32:26 +00:00
Jim Laskey
57b66c8475 Create a strong dependency for loads following stores. This will leave a 
latency period between the two.

llvm-svn: 24860
 2005-12-19 16:30:13 +00:00
Chris Lattner
7a430ddf61 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.

llvm-svn: 24859
 2005-12-19 07:57:53 +00:00
Chris Lattner
3d1946c765 don't emit 'add %o6, 0, %o6' instructions 
llvm-svn: 24857
 2005-12-19 02:51:12 +00:00
Chris Lattner
2aeb7fcbb3 Fix calls to functions returning i64 
llvm-svn: 24856
 2005-12-19 02:15:51 +00:00
Chris Lattner
63761db672 Correct bool truncstore operand order 
llvm-svn: 24855
 2005-12-19 02:06:50 +00:00
Chris Lattner
4fef952e4d add the other bool zextload as well 
llvm-svn: 24854
 2005-12-19 01:44:58 +00:00
Chris Lattner
91caf35bf5 implement zextload bool 
llvm-svn: 24853
 2005-12-19 01:43:04 +00:00
Chris Lattner
59f1a92c77 mark some unsupported ops as unsupported 
llvm-svn: 24852
 2005-12-19 01:39:40 +00:00
Chris Lattner
480e2f7945 Fix syntax for indirect calls. This fixes Olden/mst 
llvm-svn: 24850
 2005-12-19 01:22:53 +00:00
Chris Lattner
bd8b911c46 Keep stack frames 8-byte aligned. This fixes olden/voronoi 
llvm-svn: 24849
 2005-12-19 01:15:13 +00:00
Chris Lattner
b10b543e85 apparently rdy isn't actually a psuedo instruction. Use rd %y 
llvm-svn: 24848
 2005-12-19 00:53:02 +00:00
Chris Lattner
9e50ecd0d2 add fneg/fabs support for doubles 
llvm-svn: 24847
 2005-12-19 00:50:12 +00:00
Chris Lattner
0a579fb2ac Various cleanups to this pass, no functionality change 
llvm-svn: 24846
 2005-12-19 00:46:20 +00:00
Chris Lattner
be1adf763b add bool truncstores 
llvm-svn: 24845
 2005-12-19 00:19:21 +00:00
Chris Lattner
be3df4a199 Elimiante SP and FP, which weren't members of the IntRegs register class 
llvm-svn: 24844
 2005-12-19 00:06:52 +00:00
Chris Lattner
aeeb98a7dd Make sure to relegalize new nodes 
llvm-svn: 24843
 2005-12-18 23:54:29 +00:00
Chris Lattner
fdc05d74a6 The sun assembler only supports .xword in V9 mode. 
llvm-svn: 24842
 2005-12-18 23:36:45 +00:00
Chris Lattner
d0e25175d3 Configure the asmwriter to allow constant pools to be printed correctly 
llvm-svn: 24841
 2005-12-18 23:35:05 +00:00
Chris Lattner
84a2caf581 add support for integer extloads 
llvm-svn: 24840
 2005-12-18 23:18:37 +00:00
Chris Lattner
061cfe15c9 Add support for undef 
llvm-svn: 24839
 2005-12-18 23:10:57 +00:00
Chris Lattner
e8dad0dcb9 Add support for calls to external symbols 
llvm-svn: 24838
 2005-12-18 23:07:11 +00:00
Chris Lattner
745c88ba10 we have no memcpy 
llvm-svn: 24837
 2005-12-18 23:00:27 +00:00
Chris Lattner
d8c98dcfe0 Fix a crash on a call with no arguments 
llvm-svn: 24836
 2005-12-18 22:57:47 +00:00
Jeff Cohen
d46f4d16d2 Keep VC++ happy. 
llvm-svn: 24835
 2005-12-18 22:20:05 +00:00
Chris Lattner
0124442495 This is handled by the autogen'd code 
llvm-svn: 24834
 2005-12-18 21:06:11 +00:00
Chris Lattner
27357a915a Change return lowering so that we can autogen the matching code. 
llvm-svn: 24832
 2005-12-18 21:03:04 +00:00
Chris Lattner
41ec63f309 Implement Calls for V8. This would be completely autogenerated except for 
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.

llvm-svn: 24830
 2005-12-18 15:55:15 +00:00
Chris Lattner
deb7eb58be More corrections for flagged copyto/from reg 
llvm-svn: 24828
 2005-12-18 15:36:21 +00:00
Chris Lattner
daa904e19a legalize copytoreg and copyfromreg nodes that have flag operands correctly. 
llvm-svn: 24826
 2005-12-18 15:27:43 +00:00
Chris Lattner
b82f4641c4 Implement the full V8 ABI for incoming arguments. 
llvm-svn: 24825
 2005-12-18 13:33:06 +00:00
Chris Lattner
21ae63ceb9 Push ops list, asm string, and pattern all the way up to InstV8. Move the 
InstV8 class to the InstrFormats file where it belongs.

llvm-svn: 24824
 2005-12-18 08:21:00 +00:00
Chris Lattner
11fa3cc8ee Give V8 select_cc, in the spirit of the PPC backend 
llvm-svn: 24823
 2005-12-18 08:13:54 +00:00
Chris Lattner
6d46ed50a0 remove some unused instructions 
llvm-svn: 24822
 2005-12-18 07:15:17 +00:00
Chris Lattner
e0ebaa24f9 V8 doesn't have FP extload 
llvm-svn: 24821
 2005-12-18 07:13:32 +00:00
Chris Lattner
0d0850d22e simplifications, fix typo 
llvm-svn: 24820
 2005-12-18 07:09:06 +00:00
Chris Lattner
b401548fd5 add a node, for completeness 
llvm-svn: 24819
 2005-12-18 07:05:21 +00:00
Chris Lattner
941ba22d08 Add frameindex support 
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions

llvm-svn: 24818
 2005-12-18 06:59:57 +00:00
Chris Lattner
7b7ea7c7bd Tighten up some checks 
llvm-svn: 24817
 2005-12-18 06:40:34 +00:00
Jim Laskey
831eca00db Fix a bug Sabre was having where the DAG root was a group. The group dominator 
needed to be added to the ordering list, not the first member of the group.

llvm-svn: 24816
 2005-12-18 04:40:52 +00:00
Jim Laskey
a06085f024 Groups were not emitted if the dominator node and the node in the ordering list 
were not the same node.  Ultimately the test was bogus.

llvm-svn: 24815
 2005-12-18 03:59:21 +00:00
Nate Begeman
c14ad3dec7 Since extload can also be used by FP, split STDIntExtLoad into two parts, 
one for use with extload, one for use with sextload and zextload, which
are integer only.

llvm-svn: 24814
 2005-12-18 02:48:48 +00:00
Chris Lattner
2aab8f4471 Add constant pool support, including folding into addresses. 
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

llvm-svn: 24813
 2005-12-18 02:37:35 +00:00
Chris Lattner
cba8a96bd0 Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, 
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24812
 2005-12-18 02:27:00 +00:00
Chris Lattner
5303e59b7a Add initial support for global variables, and fix a bug in addr mode selection 
where we didn't select the operands.

llvm-svn: 24811
 2005-12-18 02:10:39 +00:00
Chris Lattner
1294e27969 Claiming that branch targets are registers is not very wholesome. Change them 
to be basic blocks.  Also, add uncond branches.

llvm-svn: 24810
 2005-12-18 01:46:58 +00:00
Chris Lattner
f3a888d1dd Add unordered comparisons 
llvm-svn: 24809
 2005-12-18 01:41:39 +00:00
Chris Lattner
66e29f7ead Add patterns to the rest of the int condbranches and some of the fp branches 
llvm-svn: 24808
 2005-12-18 01:38:19 +00:00
Chris Lattner
47785d8fc3 Add initial conditional branch support. This doesn't actually work yet due 
to a bug in the scheduler.

llvm-svn: 24807
 2005-12-18 01:20:35 +00:00
Chris Lattner
bb6af65f76 Simplify code 
llvm-svn: 24806
 2005-12-18 01:03:46 +00:00
Chris Lattner
9f0ac41d5c Eliminate CMPri, which is a synonym for SUBCCri 
llvm-svn: 24805
 2005-12-17 23:52:08 +00:00
Chris Lattner
bdb696294e allow custom expansion of BR_CC 
llvm-svn: 24804
 2005-12-17 23:46:46 +00:00
Chris Lattner
95e9327303 add fneg,fabs,fsqrt instructions 
llvm-svn: 24803
 2005-12-17 23:20:27 +00:00
Chris Lattner
a9adf79113 Add patterns for fround/fextend and the funny fsmuld instruction 
llvm-svn: 24802
 2005-12-17 23:14:30 +00:00
Chris Lattner
ac03e1e55e Add FP +,-,*,/ 
llvm-svn: 24801
 2005-12-17 23:10:46 +00:00
Chris Lattner
13253a829a Give patterns to F3_3 instructions 
llvm-svn: 24800
 2005-12-17 23:05:35 +00:00
Chris Lattner
057fbaea0d Implement 64-bit add/sub, make sure to receive and return 64-bit args with 
the right halves in the right regs

llvm-svn: 24799
 2005-12-17 22:55:57 +00:00
Chris Lattner
a4865938dc implement div and rem 
llvm-svn: 24798
 2005-12-17 22:39:19 +00:00
Chris Lattner
88a3754b46 implement MULHU/MULHS for 64-bit multiplies 
llvm-svn: 24797
 2005-12-17 22:30:00 +00:00
Chris Lattner
7f9e66063d Add patterns for multiply, simplify Y register handling stuff, add RDY instruction 
llvm-svn: 24796
 2005-12-17 22:22:53 +00:00
Chris Lattner
a4dbacd0d6 Make the addressing modes smarter 
llvm-svn: 24795
 2005-12-17 21:25:27 +00:00
Chris Lattner
9bd197adae remove some unused instructions 
llvm-svn: 24794
 2005-12-17 21:13:50 +00:00
Chris Lattner
a17cbf352e add andn/orn/xorn patterns. This allows us to compile this: 
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24793
 2005-12-17 21:05:49 +00:00
Chris Lattner
3afda7194f Add support for 64-bit arguments 
llvm-svn: 24792
 2005-12-17 20:59:06 +00:00
Chris Lattner
c1ab8a5e42 Sparc doesn't have sext_inreg 
llvm-svn: 24791
 2005-12-17 20:50:42 +00:00
Chris Lattner
a57b8986ea add patterns for FP stores 
llvm-svn: 24790
 2005-12-17 20:47:16 +00:00
Chris Lattner
abb86e4e22 Add [reg+reg] integer stores 
llvm-svn: 24789
 2005-12-17 20:44:36 +00:00
Chris Lattner
f9bc70e0ef Add store patterns 
llvm-svn: 24788
 2005-12-17 20:42:55 +00:00
Chris Lattner
171e828d2d add truncstore 
llvm-svn: 24787
 2005-12-17 20:42:29 +00:00
Chris Lattner
bdfee98ec0 add fp load patterns, switch rest of loads and stores to use addrmodes 
llvm-svn: 24786
 2005-12-17 20:32:47 +00:00
Chris Lattner
d775f1de68 Add integer load[r+r] forms. 
llvm-svn: 24785
 2005-12-17 20:26:45 +00:00
Chris Lattner
d09afb735d Rename load/store instructions to include an RI suffix 
llvm-svn: 24784
 2005-12-17 20:18:49 +00:00
Chris Lattner
9133c2c38b Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts 
llvm-svn: 24783
 2005-12-17 20:18:24 +00:00
Chris Lattner
3e51b620ec Add basic addressing mode support and one load. 
llvm-svn: 24782
 2005-12-17 20:04:49 +00:00
Chris Lattner
399dfec939 eliminate some redundancy 
llvm-svn: 24781
 2005-12-17 19:47:05 +00:00
Chris Lattner
e441738cef Use a combination of sethi and or to build arbitrary immediates. 
llvm-svn: 24780
 2005-12-17 19:41:43 +00:00
Chris Lattner
39740d3207 Use sethi to build large immediates with zeros at the bottom 
llvm-svn: 24779
 2005-12-17 19:37:00 +00:00
Chris Lattner
5893b95caa Add shift and small immediate support 
llvm-svn: 24778
 2005-12-17 19:07:57 +00:00
Chris Lattner
81b13ccb01 Add some basic reg-reg instructions 
llvm-svn: 24777
 2005-12-17 18:53:33 +00:00
Chris Lattner
058fe7d1ed Add empty patterns to all F3_1 instructions 
llvm-svn: 24776
 2005-12-17 18:49:14 +00:00
Evan Cheng
56649f9616 Darwin API issue: indirect load of external and weak symbols. 
llvm-svn: 24775
 2005-12-17 09:13:43 +00:00
Chris Lattner
2ba4a8584c Add some simple integer patterns. This allows us to compile this: 
int %test(int %A) {
  %B = add int %A, 1
  %C = xor int %B, 123
  ret int %C
}

into this:

test:
        save -96, %sp, %sp
        add %i0, 1, %l0
        xor %l0, 123, %i0
        restore %g0, %g0, %g0
        retl
        nop

for example.  I guess it would make sense to add reg/reg versions too.

llvm-svn: 24774
 2005-12-17 08:26:38 +00:00
Chris Lattner
4de7491c52 Implement ret with operand, giving us this: 
int %test(int %A) {
  ret int %A
}

llvm-svn: 24773
 2005-12-17 08:15:09 +00:00
Chris Lattner
b877ae7929 Add a pattern for 'ret'. This now compiles: 
void %test() { ret void }

:)

llvm-svn: 24772
 2005-12-17 08:08:42 +00:00
Chris Lattner
e7408707fd Add empty patterns for F3_2 instructions 
llvm-svn: 24771
 2005-12-17 08:06:43 +00:00
Chris Lattner
3fca9488d2 Implement LowerArguments, at least for the first 6 integer args 
llvm-svn: 24770
 2005-12-17 08:03:24 +00:00
Chris Lattner
62aadddb9d Add the framework for a dag-dag isel 
llvm-svn: 24769
 2005-12-17 07:47:01 +00:00
Evan Cheng
a3ff796fda Remove a few lines of dead code. 
llvm-svn: 24768
 2005-12-17 07:18:44 +00:00
Chris Lattner
adf84860db asmprinter done, added crucial missing step 
llvm-svn: 24767
 2005-12-17 07:17:59 +00:00
Chris Lattner
91e36127ed Use the AsmPrinter for global variable init printing. This eliminates a 
bunch of code and causes V8 to start using the fancy .asciz directive that
the sun assembler supports.

llvm-svn: 24766
 2005-12-17 07:17:08 +00:00
Chris Lattner
2b66656dd9 Switch constant pool printing over to use the Shared AsmPrinter version 
llvm-svn: 24765
 2005-12-17 07:11:43 +00:00
Chris Lattner
9fcfd38a6d Use the shared AsmPrinter code for some basic stuff. No functionality 
change except for fewer .section directives emitted

llvm-svn: 24764
 2005-12-17 07:04:29 +00:00
Evan Cheng
de142995a1 Added an idea about any_extend for performance tuning. 
llvm-svn: 24763
 2005-12-17 06:54:43 +00:00
Chris Lattner
cf47f48fe0 Convert the remaining instructions over, branches and calls. Fix a couple 
minor bugs

llvm-svn: 24762
 2005-12-17 06:54:41 +00:00
Chris Lattner
b3456f1885 convert FP instructions to use an asmstring and operand list, allowing FP 
programs to work on V8 again

llvm-svn: 24761
 2005-12-17 06:32:52 +00:00
Evan Cheng
c308dfb801 Added truncate. 
llvm-svn: 24760
 2005-12-17 02:02:50 +00:00
Evan Cheng
6a94c77c55 Added anyext, modelled as zext on X86. 
llvm-svn: 24759
 2005-12-17 01:47:57 +00:00
Evan Cheng
19550821d1 Added some isel ideas. 
llvm-svn: 24757
 2005-12-17 01:25:19 +00:00
Evan Cheng
5d90b26707 Added support for cmp, test, and conditional move instructions. 
llvm-svn: 24756
 2005-12-17 01:24:02 +00:00
Evan Cheng
566600c17d Only lower SELECT when using DAG based isel. 
llvm-svn: 24755
 2005-12-17 01:22:13 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Jim Laskey
37957b1ad3 Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner
ba98d302be Weak and linkonce global vars should still have a .globl emitted for them 
llvm-svn: 24747
 2005-12-16 21:46:14 +00:00
Nate Begeman
69da94a1b9 Add a second vector type to the VRRC register class, and fix some patterns 
so that tablegen can infer all types.

llvm-svn: 24746
 2005-12-16 09:19:13 +00:00
Chris Lattner
2c9fd95c73 add some notes 
llvm-svn: 24745
 2005-12-16 07:20:53 +00:00
Chris Lattner
86914b7f4e Add a couple more instrs 
llvm-svn: 24744
 2005-12-16 07:18:48 +00:00
Chris Lattner
29c644f929 remove some dead code 
llvm-svn: 24743
 2005-12-16 07:16:02 +00:00
Chris Lattner
a7ead87ba4 asmprint pseudo instrs 
llvm-svn: 24742
 2005-12-16 07:13:26 +00:00
Chris Lattner
16896ce1ed Autogenerate asmprinter for F3_2 instructions 
llvm-svn: 24741
 2005-12-16 07:10:02 +00:00
Chris Lattner
b9b7b057d6 Switch F3_1 instructions over to use AsmStrings 
llvm-svn: 24740
 2005-12-16 06:52:00 +00:00
Chris Lattner
8fd4bf0ac7 Plug in basic hooks for an autogenerated asm printer to fill in. 
llvm-svn: 24739
 2005-12-16 06:34:17 +00:00
Chris Lattner
60e5e47904 Add operand info for F3_[12] instructions, getting V8 back to basic functionality. 
With this, Regression/CodeGen/SparcV8/basictest.ll now passes.  Lets hear it
for regression tests :)

llvm-svn: 24738
 2005-12-16 06:25:42 +00:00
Chris Lattner
44de5f7807 Remove JIT support, which doesn't work. 
llvm-svn: 24736
 2005-12-16 06:06:07 +00:00
Chris Lattner
a795cdbfcd add some simple operand info 
llvm-svn: 24735
 2005-12-16 06:02:58 +00:00
Chris Lattner
890fd4e66c Update the darwin handling of linkonce & weak functions and GV stubs. This 
should work in all permutations.

llvm-svn: 24728
 2005-12-16 00:22:14 +00:00
Chris Lattner
71443a0e36 Don't globalize internal functions 
llvm-svn: 24727
 2005-12-16 00:07:30 +00:00
Evan Cheng
43152cb8b6 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.

llvm-svn: 24726
 2005-12-15 19:49:23 +00:00
Chris Lattner
d4a3cb4d86 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support 
if after legalize.  This fixes IA64 failures.

llvm-svn: 24725
 2005-12-15 19:02:38 +00:00
Evan Cheng
f72e7055c0 Added frameindex, constpool, globaladdr, and externalsym as root nodes of 
leaaddr.

llvm-svn: 24724
 2005-12-15 08:31:04 +00:00
Evan Cheng
9c0d7cacf7 Added constpool, frameindex, and externalsym nodes. 
llvm-svn: 24723
 2005-12-15 08:29:48 +00:00
Evan Cheng
cc6efa8b6f Handling zero extension of 1 bit value. 
llvm-svn: 24722
 2005-12-15 01:02:48 +00:00
Evan Cheng
576b826f71 Use MOV8rm to load 1 bit value. 
llvm-svn: 24721
 2005-12-15 00:59:17 +00:00
Nate Begeman
f5ac708070 Remove a now unused statistic. 
llvm-svn: 24720
 2005-12-14 22:56:16 +00:00