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llvm-mirror/lib/Target/Hexagon
Guillaume Chatelet 0a29dd919f [Alignment][NFC] Migrate TTI::getMaskedMemoryOpCost to Align
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D82569
2020-06-26 10:14:16 +00:00
..
AsmParser std::isspace -> llvm::isSpace (where locale should be ignored) 2020-05-02 15:36:04 +02:00
Disassembler
MCTargetDesc [MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset 2020-05-22 15:47:26 -07:00
TargetInfo
BitTracker.cpp
BitTracker.h
CMakeLists.txt Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
Hexagon.h
Hexagon.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp
HexagonBitTracker.cpp [Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign() 2020-04-01 14:08:28 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp
HexagonCallingConv.td [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp Fix several places that were calling verifyFunction or verifyModule without checking the return value. 2020-05-18 13:28:46 -07:00
HexagonConstExtenders.cpp
HexagonConstPropagation.cpp
HexagonCopyToCombine.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
HexagonDepArch.h
HexagonDepArch.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonDepDecoders.inc
HexagonDepIICHVX.td
HexagonDepIICScalar.td
HexagonDepInstrFormats.td
HexagonDepInstrInfo.td
HexagonDepITypes.h
HexagonDepITypes.td
HexagonDepMapAsm2Intrin.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonDepMappings.td
HexagonDepMask.h
HexagonDepOperands.td
HexagonDepTimingClasses.h
HexagonEarlyIfConv.cpp MachineBasicBlock::updateTerminator now requires an explicit layout successor. 2020-06-06 22:30:51 -04:00
HexagonExpandCondsets.cpp
HexagonFixupHwLoops.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
HexagonFrameLowering.cpp [MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset 2020-05-22 15:47:26 -07:00
HexagonFrameLowering.h CodeGen: Use Register in TargetFrameLowering 2020-04-07 17:07:44 -04:00
HexagonGenExtract.cpp
HexagonGenInsert.cpp
HexagonGenMux.cpp
HexagonGenPredicate.cpp
HexagonHardwareLoops.cpp CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrFormats.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td [llvm] NFC: Fix trivial typo in rst and td files 2020-04-23 14:26:32 +09:00
HexagonInstrInfo.cpp [AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes 2020-06-01 22:52:34 +05:30
HexagonInstrInfo.h [AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes 2020-06-01 22:52:34 +05:30
HexagonIntrinsics.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
HexagonISelDAGToDAG.cpp [Alignment][NFC] Deprecate getMaxAlignment 2020-03-18 14:48:45 +01:00
HexagonISelDAGToDAG.h [Hexagon] Remove unused forward declarations. NFC. 2020-04-22 18:26:50 +01:00
HexagonISelDAGToDAGHVX.cpp [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
HexagonISelLowering.cpp [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
HexagonISelLowering.h Revert "[Alignment][NFC] Migrate TargetLowering::allowsMemoryAccess" 2020-06-09 10:43:59 +00:00
HexagonISelLoweringHVX.cpp [SelectionDAG] Use Align/MaybeAlign for ConstantPoolSDNode. 2020-05-08 16:04:11 -07:00
HexagonLoopIdiomRecognition.cpp [SCEV] Move ScalarEvolutionExpander.cpp to Transforms/Utils (NFC). 2020-05-20 10:53:40 +01:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
HexagonOperands.td
HexagonOptAddrMode.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
HexagonOptimizeSZextends.cpp
HexagonPatterns.td [Hexagon] Fix fshl/fshr -> combine() bug identified in D75114 2020-03-06 17:23:10 +00:00
HexagonPatternsHVX.td
HexagonPatternsV65.td
HexagonPeephole.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
HexagonPseudo.td [TableGen] Drop deprecated leading # operation (NOP) and replace ## with # 2020-04-25 16:26:45 -07:00
HexagonRDFOpt.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
HexagonRegisterInfo.cpp CodeGen: Use Register in TargetFrameLowering 2020-04-07 17:07:44 -04:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
HexagonSchedule.td
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonStoreWidening.cpp [Alignment][NFC] Use Align version of getMachineMemOperand 2020-03-30 15:46:27 +00:00
HexagonSubtarget.cpp [Hexagon] Check isInstr() before getInstr() with SUnit 2020-05-14 08:47:54 -05:00
HexagonSubtarget.h Provide operand indices to adjustSchedDependency 2020-04-17 11:08:44 +01:00
HexagonTargetMachine.cpp
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp TargetLoweringObjectFile.h - remove unnecessary includes. NFCI. 2020-05-19 09:28:13 +01:00
HexagonTargetObjectFile.h TargetLoweringObjectFile.h - remove unnecessary includes. NFCI. 2020-05-19 09:28:13 +01:00
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [Alignment][NFC] Migrate TTI::getMaskedMemoryOpCost to Align 2020-06-26 10:14:16 +00:00
HexagonTargetTransformInfo.h [Alignment][NFC] Migrate TTI::getMaskedMemoryOpCost to Align 2020-06-26 10:14:16 +00:00
HexagonVectorLoopCarriedReuse.cpp
HexagonVectorPrint.cpp
HexagonVExtract.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
HexagonVLIWPacketizer.cpp [Target] Fix typos. NFC 2020-05-22 14:40:43 +02:00
HexagonVLIWPacketizer.h
LLVMBuild.txt
RDFCopy.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFCopy.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00