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4bfea803ed
After D98856 these tests will by default break (fatal_error) if any of the wrong interfaces are used, so there's no longer a need to have a RUN line that checks for a warning message emitted by the compiler.
253 lines
8.1 KiB
LLVM
253 lines
8.1 KiB
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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;
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; Testing prfop encodings
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;
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define void @test_svprf_pldl1strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pldl1strm
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; CHECK: prfb pldl1strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 1)
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ret void
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}
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define void @test_svprf_pldl2keep(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pldl2keep
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; CHECK: prfb pldl2keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 2)
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ret void
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}
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define void @test_svprf_pldl2strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pldl2strm
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; CHECK: prfb pldl2strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 3)
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ret void
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}
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define void @test_svprf_pldl3keep(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pldl3keep
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; CHECK: prfb pldl3keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 4)
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ret void
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}
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define void @test_svprf_pldl3strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pldl3strm
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; CHECK: prfb pldl3strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 5)
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ret void
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}
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define void @test_svprf_pstl1keep(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl1keep
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; CHECK: prfb pstl1keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 8)
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ret void
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}
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define void @test_svprf_pstl1strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl1strm
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; CHECK: prfb pstl1strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 9)
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ret void
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}
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define void @test_svprf_pstl2keep(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl2keep
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; CHECK: prfb pstl2keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 10)
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ret void
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}
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define void @test_svprf_pstl2strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl2strm
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; CHECK: prfb pstl2strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 11)
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ret void
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}
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define void @test_svprf_pstl3keep(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl3keep
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; CHECK: prfb pstl3keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 12)
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ret void
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}
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define void @test_svprf_pstl3strm(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprf_pstl3strm
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; CHECK: prfb pstl3strm, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 13)
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ret void
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}
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;
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; Testing imm limits of SI form
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;
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define void @test_svprf_vnum_under(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) {
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; CHECK-LABEL: test_svprf_vnum_under
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; CHECK-NOT: prfb pstl3strm, p0, [x0, #-33, mul vl]
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entry:
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%gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 -33, i64 0
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13)
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ret void
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}
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define void @test_svprf_vnum_min(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) {
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; CHECK-LABEL: test_svprf_vnum_min
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; CHECK: prfb pstl3strm, p0, [x0, #-32, mul vl]
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entry:
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%gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 -32, i64 0
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13)
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ret void
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}
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define void @test_svprf_vnum_over(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) {
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; CHECK-LABEL: test_svprf_vnum_over
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; CHECK-NOT: prfb pstl3strm, p0, [x0, #32, mul vl]
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entry:
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%gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 32, i64 0
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13)
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ret void
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}
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define void @test_svprf_vnum_max(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) {
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; CHECK-LABEL: test_svprf_vnum_max
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; CHECK: prfb pstl3strm, p0, [x0, #31, mul vl]
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entry:
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%gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 31, i64 0
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13)
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ret void
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}
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;
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; scalar contiguous
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;
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define void @test_svprfb(<vscale x 16 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprfb
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; CHECK: prfb pldl1keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 0)
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ret void
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}
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define void @test_svprfh(<vscale x 8 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprfh
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; CHECK: prfh pldl1keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %base, i32 0)
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ret void
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}
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define void @test_svprfw(<vscale x 4 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprfw
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; CHECK: prfw pldl1keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %base, i32 0)
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ret void
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}
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define void @test_svprfd(<vscale x 2 x i1> %pg, i8* %base) {
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; CHECK-LABEL: test_svprfd
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; CHECK: prfd pldl1keep, p0, [x0]
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entry:
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tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %base, i32 0)
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ret void
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}
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;
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; scalar + imm contiguous
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;
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; imm form of prfb is tested above
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define void @test_svprfh_vnum(<vscale x 8 x i1> %pg, <vscale x 8 x i16>* %base) {
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; CHECK-LABEL: test_svprfh_vnum
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; CHECK: prfh pstl3strm, p0, [x0, #31, mul vl]
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entry:
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%gep = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %base, i64 31
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%addr = bitcast <vscale x 8 x i16>* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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define void @test_svprfw_vnum(<vscale x 4 x i1> %pg, <vscale x 4 x i32>* %base) {
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; CHECK-LABEL: test_svprfw_vnum
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; CHECK: prfw pstl3strm, p0, [x0, #31, mul vl]
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entry:
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%gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %base, i64 31
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%addr = bitcast <vscale x 4 x i32>* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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define void @test_svprfd_vnum(<vscale x 2 x i1> %pg, <vscale x 2 x i64>* %base) {
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; CHECK-LABEL: test_svprfd_vnum
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; CHECK: prfd pstl3strm, p0, [x0, #31, mul vl]
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entry:
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%gep = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %base, i64 31
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%addr = bitcast <vscale x 2 x i64>* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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;
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; scalar + scaled scalar contiguous
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;
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define void @test_svprfb_ss(<vscale x 16 x i1> %pg, i8* %base, i64 %offset) {
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; CHECK-LABEL: test_svprfb_ss
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; CHECK: prfb pstl3strm, p0, [x0, x1]
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entry:
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%addr = getelementptr i8, i8* %base, i64 %offset
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tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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define void @test_svprfh_ss(<vscale x 8 x i1> %pg, i16* %base, i64 %offset) {
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; CHECK-LABEL: test_svprfh_ss
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; CHECK: prfh pstl3strm, p0, [x0, x1, lsl #1]
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entry:
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%gep = getelementptr i16, i16* %base, i64 %offset
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%addr = bitcast i16* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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define void @test_svprfw_ss(<vscale x 4 x i1> %pg, i32* %base, i64 %offset) {
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; CHECK-LABEL: test_svprfw_ss
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; CHECK: prfw pstl3strm, p0, [x0, x1, lsl #2]
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entry:
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%gep = getelementptr i32, i32* %base, i64 %offset
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%addr = bitcast i32* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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define void @test_svprfd_ss(<vscale x 2 x i1> %pg, i64* %base, i64 %offset) {
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; CHECK-LABEL: test_svprfd_ss
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; CHECK: prfd pstl3strm, p0, [x0, x1, lsl #3]
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entry:
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%gep = getelementptr i64, i64* %base, i64 %offset
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%addr = bitcast i64* %gep to i8*
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tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %addr, i32 13)
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ret void
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}
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declare void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1>, i8*, i32)
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declare void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1>, i8*, i32)
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declare void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1>, i8*, i32)
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declare void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1>, i8*, i32)
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