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c564824e50
Summary:
r372285 changed LLVM to use a `TargetConstant` for parameters of intrinsics that are required to be immediates.
Since that commit, use of `%llvm.ppc.altivec.vc{fsx,fux,tsxs,tuxs}` intrinsics has not worked, and resulted in a `LLVM ERROR: Cannot select: intrinsic %llvm.ppc.altivec.vc*` error. The intrinsics' TableGen definitions matched on `imm` instead of `timm`.
This commit updates those definitions to use `timm`.
Fixes: https://llvm.org/PR44239
Reviewers: hfinkel, nemanjai, #powerpc, Jim
Reviewed By: Jim
Subscribers: qiucf, wuzish, Jim, hiraditya, kbarton, jsji, shchenz, llvm-commits
Tags: #llvm
Patched by vddvss (Colin Samples).
Differential Revision: https://reviews.llvm.org/D71138
41 lines
1.2 KiB
LLVM
41 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -verify-machineinstrs < %s | FileCheck %s
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define <4 x float> @check_vcfsx(<4 x i32> %a) {
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entry:
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%0 = tail call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> %a, i32 1)
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ret <4 x float> %0
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; CHECK-LABEL: check_vcfsx
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; CHECK: vcfsx {{[0-9]+}}, {{[0-9]+}}, 1
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}
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define <4 x float> @check_vcfux(<4 x i32> %a) {
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entry:
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%0 = tail call <4 x float> @llvm.ppc.altivec.vcfux(<4 x i32> %a, i32 1)
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ret <4 x float> %0
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; CHECK-LABEL: check_vcfux
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; CHECK: vcfux {{[0-9]+}}, {{[0-9]+}}, 1
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}
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define <4 x i32> @check_vctsxs(<4 x float> %a) {
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entry:
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%0 = tail call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> %a, i32 1)
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ret <4 x i32> %0
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; CHECK-LABEL: check_vctsxs
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; CHECK: vctsxs {{[0-9]+}}, {{[0-9]+}}, 1
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}
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define <4 x i32> @check_vctuxs(<4 x float> %a) {
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entry:
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%0 = tail call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> %a, i32 1)
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ret <4 x i32> %0
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; CHECK-LABEL: check_vctuxs
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; CHECK: vctuxs {{[0-9]+}}, {{[0-9]+}}, 1
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}
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declare <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32>, i32 immarg)
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declare <4 x float> @llvm.ppc.altivec.vcfux(<4 x i32>, i32 immarg)
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declare <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float>, i32 immarg)
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declare <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float>, i32 immarg)
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