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llvm-mirror/lib/Target/AMDGPU
Sam Kolton 1310b4c7b3 [AMDGPU] Add subtarget features for SDWA/DPP
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28900

llvm-svn: 292596
2017-01-20 10:01:25 +00:00
..
AsmParser [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
Disassembler AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
InstPrinter AMDGPU: Change vintrp printing 2016-12-14 16:36:12 +00:00
MCTargetDesc Apply clang-tidy's performance-unnecessary-value-param to LLVM. 2017-01-13 14:39:03 +00:00
TargetInfo Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
Utils [AMDGPU] Assembler: fix v_mac_f16 immediates 2017-01-17 15:26:02 +00:00
AMDGPU.h [AMDGPU] Add amdgpu-unify-metadata pass 2016-12-08 19:46:04 +00:00
AMDGPU.td [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp [AMDGPU] Scalarization of global uniform loads. 2016-12-08 17:28:47 +00:00
AMDGPUAsmPrinter.cpp [AMDGPU] Do not emit .AMDGPU.config section for amdhsa 2017-01-06 17:02:10 +00:00
AMDGPUAsmPrinter.h AMDGPU: Emit runtime metadata as a note element in .note section 2016-11-10 21:18:49 +00:00
AMDGPUCallingConv.td
AMDGPUCallLowering.cpp AMDGPU/SI: Fix file header 2016-12-21 19:06:24 +00:00
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp AMDGPU: Allow rcp and rsq usage with f16 2016-12-22 03:05:44 +00:00
AMDGPUFrameLowering.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
AMDGPUFrameLowering.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
AMDGPUInstrInfo.cpp MachineScheduler: Export function to construct "default" scheduler. 2016-11-28 20:11:54 +00:00
AMDGPUInstrInfo.h MachineScheduler: Export function to construct "default" scheduler. 2016-11-28 20:11:54 +00:00
AMDGPUInstrInfo.td AMDGPU: Add replacement export intrinsics 2017-01-17 07:26:53 +00:00
AMDGPUInstructions.td [AMDGPU] Implement f16 fcopysign and fcopysign(f32, f64) 2017-01-13 19:49:25 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp AMDGPU: Remove modifiers from v_div_scale_* 2017-01-19 06:04:12 +00:00
AMDGPUISelLowering.cpp AMDGPU: Disable some fneg combines unless nsz 2017-01-19 06:35:27 +00:00
AMDGPUISelLowering.h AMDGPU: Disable some fneg combines unless nsz 2017-01-19 06:35:27 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h AMDGPU/SI: Set correct value for amd_kernel_code_t::kernarg_segment_alignment 2016-12-06 21:53:10 +00:00
AMDGPUMCInstLower.cpp [AMDGPU] Add wave barrier builtin 2016-11-15 19:00:15 +00:00
AMDGPUMCInstLower.h
AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPUPromoteAlloca.cpp AMDGPU: Fix AMDGPUPromoteAlloca breaking addrspacecasts 2016-12-10 00:52:50 +00:00
AMDGPUPTNote.h AMDGPU: Emit runtime metadata as a note element in .note section 2016-11-10 21:18:49 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPURuntimeMetadata.h fix gcc warning about a superfluous ; 2016-12-14 20:33:54 +00:00
AMDGPUSubtarget.cpp [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
AMDGPUSubtarget.h [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
AMDGPUTargetMachine.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-12 22:23:53 +00:00
AMDGPUTargetMachine.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
AMDGPUTargetObjectFile.cpp Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject. 2016-10-24 19:23:39 +00:00
AMDGPUTargetObjectFile.h Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject. 2016-10-24 19:23:39 +00:00
AMDGPUTargetTransformInfo.cpp [X86] updating TTI costs for arithmetic instructions on X86\SLM arch. 2017-01-11 08:23:37 +00:00
AMDGPUTargetTransformInfo.h [X86] updating TTI costs for arithmetic instructions on X86\SLM arch. 2017-01-11 08:23:37 +00:00
AMDGPUUnifyMetadata.cpp [AMDGPU] When unifying metadata, add operands to named metadata individually 2016-12-19 16:54:24 +00:00
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td AMDGPU/SI: Add a MachineMemOperand when lowering llvm.amdgcn.buffer.load.* 2016-12-20 17:19:44 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt [AMDGPU] Add amdgpu-unify-metadata pass 2016-12-08 19:46:04 +00:00
DSInstructions.td AMDGPU: Add VI i16 support 2016-11-10 16:02:37 +00:00
EvergreenInstructions.td ADMGPU/EG,CM: Implement _noret global atomics 2017-01-16 21:20:13 +00:00
FLATInstructions.td AMDGPU: split ret/noret patterns for global atomics 2016-12-23 15:34:51 +00:00
GCNHazardRecognizer.cpp AMDGPU: Rename flat operands to match mubuf 2016-11-29 19:30:44 +00:00
GCNHazardRecognizer.h AMDGPU/SI: Handle hazard with s_rfe_b64 2016-10-27 23:50:21 +00:00
GCNSchedStrategy.cpp AMDGPU/SI: Allow using SGPRs 96-101 on VI 2016-12-09 19:49:40 +00:00
GCNSchedStrategy.h
LLVMBuild.txt
MIMGInstructions.td AMDGPU/SI: Add a MachineMemOperand to MIMG instructions 2016-12-20 15:52:17 +00:00
Processors.td AMDGPU: Refactor processor definition to use ISA version features 2016-10-26 16:37:56 +00:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600FrameLowering.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-12 22:23:53 +00:00
R600FrameLowering.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodes 2017-01-06 21:00:46 +00:00
R600Intrinsics.td
R600ISelLowering.cpp ADMGPU/EG,CM: Implement _noret global atomics 2017-01-16 21:20:13 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
R600OptimizeVectorRegisters.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-12 22:23:53 +00:00
R600Packetizer.cpp Fix spelling mistakes in AMDGPU target comments. NFC. 2016-11-18 11:04:02 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDebuggerInsertNops.cpp
SIDefines.h AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
SIFixControlFlowLiveIntervals.cpp
SIFixSGPRCopies.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SIFoldOperands.cpp AMDGPU: Fix folding immediates into mac src2 2017-01-11 22:00:02 +00:00
SIFrameLowering.cpp AMDGPU: Fix using incorrect private resource with no allocation 2016-10-28 19:43:31 +00:00
SIFrameLowering.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
SIInsertSkips.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SIInsertWaits.cpp AMDGPU/SI: Implement sendmsghalt intrinsic 2017-01-04 18:06:55 +00:00
SIInstrFormats.td AMDGPU: Fix vintrp disassembly 2016-12-10 00:29:55 +00:00
SIInstrInfo.cpp [AMDGPU] Prevent spills before exec mask is restored 2017-01-20 00:44:31 +00:00
SIInstrInfo.h [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
SIInstrInfo.td AMDGPU: Add replacement export intrinsics 2017-01-17 07:26:53 +00:00
SIInstructions.td AMDGPU: Add replacement export intrinsics 2017-01-17 07:26:53 +00:00
SIIntrinsics.td AMDGPU: Refactor exp instructions 2016-12-05 20:23:10 +00:00
SIISelLowering.cpp AMDGPU: Add replacement export intrinsics 2017-01-17 07:26:53 +00:00
SIISelLowering.h AMDGPU: Add Assert[SZ]Ext during argument load creation 2017-01-09 18:52:39 +00:00
SILoadStoreOptimizer.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SILowerControlFlow.cpp [AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse 2017-01-19 21:26:22 +00:00
SILowerI1Copies.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SIMachineFunctionInfo.cpp AMDGPU/SI: Make a function const 2016-12-20 17:26:34 +00:00
SIMachineFunctionInfo.h AMDGPU/SI: Make a function const 2016-12-20 17:26:34 +00:00
SIMachineScheduler.cpp AMDGPU: Fixed '!NodePtr->isKnownSentinel()' assert 2016-12-22 16:06:32 +00:00
SIMachineScheduler.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
SIOptimizeExecMasking.cpp
SIRegisterInfo.cpp [AMDGPU] Do not allow register coalescer to create big superregs 2017-01-18 17:30:05 +00:00
SIRegisterInfo.h [AMDGPU] Do not allow register coalescer to create big superregs 2017-01-18 17:30:05 +00:00
SIRegisterInfo.td AMDGPU: Make AllocationPriority of SGPRs higher than VGPRs 2016-12-14 16:52:06 +00:00
SISchedule.td
SIShrinkInstructions.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SITypeRewriter.cpp
SIWholeQuadMode.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
SMInstructions.td [AMDGPU] Scalarization of global uniform loads. 2016-12-08 17:28:47 +00:00
SOPInstructions.td AMDGPU/SI: Implement sendmsghalt intrinsic 2017-01-04 18:06:55 +00:00
VIInstrFormats.td
VIInstructions.td AMDGPU: Add VI i16 support 2016-11-10 16:02:37 +00:00
VOP1Instructions.td [AMDGPU] Assembler: SDWA/DPP should not accept scalar registers and immediate operands 2017-01-11 11:46:30 +00:00
VOP2Instructions.td [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
VOP3Instructions.td AMDGPU: Remove modifiers from v_div_scale_* 2017-01-19 06:04:12 +00:00
VOPCInstructions.td [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00
VOPInstructions.td [AMDGPU] Add subtarget features for SDWA/DPP 2017-01-20 10:01:25 +00:00