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llvm-mirror/test/CodeGen
Stanislav Mekhanoshin f1c6dbc4d5 [AMDGPU] gfx90a support
Differential Revision: https://reviews.llvm.org/D96906
2021-02-17 16:01:32 -08:00
..
AArch64 [GlobalISel] Add G_ASSERT_SEXT 2021-02-17 13:10:34 -08:00
AMDGPU [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
ARC
ARM [LSR] Add a flag that overrides the target's preferred addressing mode 2021-02-17 16:50:21 +00:00
AVR [AVR] Fix a bug in 16-bit shifts 2021-02-14 11:54:55 +08:00
BPF
Generic [CodeGen] New pass: Replace vector intrinsics with call to vector library 2021-02-12 12:53:27 -05:00
Hexagon
Inputs
Lanai
Mips
MIR [AMDGPU] gfx90a support 2021-02-17 16:01:32 -08:00
MSP430
NVPTX
PowerPC [PowerPC][AIX] Enable Shrinkwrapping on 32 and 64 bit AIX. 2021-02-17 14:54:57 +00:00
RISCV [RISCV] Add support for fixed vector vselect 2021-02-17 10:59:00 +00:00
SPARC
SystemZ [SystemZ] Separate LoZ ELF specifics in tablegen. 2021-02-17 16:11:58 -05:00
Thumb
Thumb2 [ARM] Use rGPR for writeback vldrs 2021-02-16 16:44:47 +00:00
VE
WebAssembly [WebAssemblly] Fix EHPadStack update in fixCallUnwindMismatches 2021-02-17 12:14:11 -08:00
WinCFGuard
WinEH
X86 [DAG] Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d))) (REAPPLIED) 2021-02-17 11:42:43 +00:00
XCore