1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
llvm-mirror/test/MC/Disassembler/ARM
James Molloy 17c114f241 Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back.
Note: The current code in DecodeMSRMask() rejects the unpredictable A/R MSR mask '0000' with Fail. The code in the patch follows this style and rejects unpredictable M-class MSR masks also with Fail (instead of SoftFail). If SoftFail is preferred in this case then additional changes to ARMInstPrinter (to print non-symbolic masks) and ARMAsmParser (to parse non-symbolic masks) will be needed.

Patch by Petr Pavlu!

llvm-svn: 214505
2014-08-01 12:42:11 +00:00
..
addrmode2-reencoding.txt ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions 2014-01-12 04:36:01 +00:00
arm-LDREXD-reencoding.txt
arm-STREXD-reencoding.txt
arm-tests.txt
arm-thumb-trustzone.txt
arm-trustzone.txt
basic-arm-instructions-v8.txt
basic-arm-instructions.txt
crc32-thumb.txt
crc32.txt
fp-armv8.txt [ARM] Add support for MVFR2 which is new in ARMv8 2013-11-11 19:56:13 +00:00
fp-encoding.txt
hex-immediates.txt ARM: honor hex immediate formatting for ldr/str i12 offsets. 2014-06-11 20:26:45 +00:00
invalid-armv7.txt
invalid-armv8.txt
invalid-because-armv7.txt [ARM] Add support for MVFR2 which is new in ARMv8 2013-11-11 19:56:13 +00:00
invalid-FSTMX-arm.txt
invalid-IT-CC15.txt
invalid-thumb-MSR-MClass.txt Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back. 2014-08-01 12:42:11 +00:00
invalid-thumbv7-xfail.txt
invalid-thumbv7.txt ARM: implement support for the UDF mnemonic 2014-05-14 03:47:39 +00:00
invalid-thumbv8.txt [ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings) 2013-11-08 16:25:50 +00:00
ldrd-armv4.txt
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
load-store-acquire-release-v8-thumb.txt
load-store-acquire-release-v8.txt
marked-up-thumb.txt
memory-arm-instructions.txt
neon-crypto.txt
neon-tests.txt
neon-v8.txt
neon.txt
neont2.txt
neont-VLD-reencoding.txt
neont-VST-reencoding.txt
thumb1.txt
thumb2-v8.txt [ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings) 2013-11-08 16:25:50 +00:00
thumb2.txt
thumb-fp-armv8.txt
thumb-MSR-MClass.txt Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back. 2014-08-01 12:42:11 +00:00
thumb-neon-crypto.txt
thumb-neon-v8.txt
thumb-printf.txt
thumb-tests.txt
thumb-v8.txt
unpredictable-ADC-arm.txt
unpredictable-ADDREXT3-arm.txt
unpredictable-AExtI-arm.txt
unpredictable-AI1cmp-arm.txt
unpredictable-BFI.txt
unpredictable-LDR-arm.txt
unpredictable-LDRD-arm.txt
unpredictable-LSL-regform.txt
unpredictable-MRRC2-arm.txt
unpredictable-MRS-arm.txt
unpredictable-MUL-arm.txt
unpredictable-RSC-arm.txt
unpredictable-SEL-arm.txt
unpredictable-SHADD16-arm.txt
unpredictable-SSAT-arm.txt
unpredictable-STRBrs-arm.txt
unpredictable-swp-arm.txt
unpredictable-UQADD8-arm.txt
unpredictables-thumb.txt
vfp4.txt