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5e3882c1d0
New instructions are added to AArch32 and AArch64 to aid floating-point multiplication and addition of complex numbers, where the complex numbers are packed in a vector register as a pair of elements. The Imaginary part of the number is placed in the more significant element, and the Real part of the number is placed in the less significant element. This patch adds assembler for the ARM target. Differential Revision: https://reviews.llvm.org/D36789 llvm-svn: 314511
67 lines
2.9 KiB
Plaintext
67 lines
2.9 KiB
Plaintext
# RUN: llvm-mc -triple thumbv8a -mattr=+v8.3a,+neon,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP16
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# RUN: not llvm-mc -triple thumbv8a -mattr=+v8.2a,+neon,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16
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# RUN: not llvm-mc -triple thumbv8a -mattr=+v8.3a,-neon,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16
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# RUN: not llvm-mc -triple thumbv8a -mattr=+v8.3a,+neon,-fullfp16 -disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK
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# RUN: FileCheck %s < %t --check-prefix=MISSING-FP16
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[0x21,0xfc,0x02,0x08]
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# CHECK-FP16: vcmla.f16 d0, d1, d2, #0
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# MISSING-FP16: warning: invalid instruction encoding
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[0x22,0xfc,0x44,0x08]
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# CHECK-FP16: vcmla.f16 q0, q1, q2, #0
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# MISSING-FP16: warning: invalid instruction encoding
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[0x31,0xfc,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2, #0
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# MISSING: warning: invalid instruction encoding
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[0x32,0xfc,0x44,0x08]
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# CHECK: vcmla.f32 q0, q1, q2, #0
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# MISSING: warning: invalid instruction encoding
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[0xb1,0xfc,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2, #90
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# MISSING: warning: invalid instruction encoding
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[0x31,0xfd,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2, #180
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# MISSING: warning: invalid instruction encoding
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[0xb1,0xfd,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2, #270
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# MISSING: warning: invalid instruction encoding
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[0x81,0xfc,0x02,0x08]
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# CHECK-FP16: vcadd.f16 d0, d1, d2, #90
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# MISSING-FP16: warning: invalid instruction encoding
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[0x82,0xfc,0x44,0x08]
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# CHECK-FP16: vcadd.f16 q0, q1, q2, #90
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# MISSING-FP16: warning: invalid instruction encoding
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[0x91,0xfc,0x02,0x08]
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# CHECK: vcadd.f32 d0, d1, d2, #90
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# MISSING: warning: invalid instruction encoding
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[0x92,0xfc,0x44,0x08]
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# CHECK: vcadd.f32 q0, q1, q2, #90
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# MISSING: warning: invalid instruction encoding
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[0x91,0xfd,0x02,0x08]
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# CHECK: vcadd.f32 d0, d1, d2, #270
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# MISSING: warning: invalid instruction encoding
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[0x01,0xfe,0x02,0x08]
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# CHECK-FP16: vcmla.f16 d0, d1, d2[0], #0
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# MISSING-FP16: warning: invalid instruction encoding
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[0x02,0xfe,0x42,0x08]
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# CHECK-FP16: vcmla.f16 q0, q1, d2[0], #0
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# MISSING-FP16: warning: invalid instruction encoding
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[0x81,0xfe,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2[0], #0
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# MISSING: warning: invalid instruction encoding
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[0x82,0xfe,0x42,0x08]
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# CHECK: vcmla.f32 q0, q1, d2[0], #0
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# MISSING: warning: invalid instruction encoding
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[0x91,0xfe,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2[0], #90
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# MISSING: warning: invalid instruction encoding
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[0xa1,0xfe,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2[0], #180
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# MISSING: warning: invalid instruction encoding
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[0xb1,0xfe,0x02,0x08]
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# CHECK: vcmla.f32 d0, d1, d2[0], #270
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# MISSING: warning: invalid instruction encoding
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[0x01,0xfe,0x22,0x08]
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# CHECK-FP16: vcmla.f16 d0, d1, d2[1], #0
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# MISSING-FP16: warning: invalid instruction encoding
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