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b411e57bfe
Agner's tables indicate that for SSE42+ targets (Core2 and later) we can reduce the FADD/FSUB/FMUL costs down to 1, which should fix the Himeno benchmark. Note: the AVX512 FDIV costs look rather dodgy, but this isn't part of this patch. Differential Revision: https://reviews.llvm.org/D43733 llvm-svn: 326133
89 lines
4.0 KiB
LLVM
89 lines
4.0 KiB
LLVM
; RUN: opt -S -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck %s -check-prefix=CORE2
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; RUN: opt -S -mtriple=x86_64-apple-darwin -mcpu=corei7 -cost-model -analyze < %s | FileCheck %s -check-prefix=COREI7
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; If SSE4.1 roundps instruction is available it is cheap to lower, otherwise
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; it'll be scalarized into calls which are expensive.
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define void @test1(float* nocapture %f) nounwind {
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vector.ph:
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds float, float* %f, i64 %index
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%1 = bitcast float* %0 to <4 x float>*
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%wide.load = load <4 x float>, <4 x float>* %1, align 4
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%2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
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store <4 x float> %2, <4 x float>* %1, align 4
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%index.next = add i64 %index, 4
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%3 = icmp eq i64 %index.next, 1024
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br i1 %3, label %for.end, label %vector.body
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for.end: ; preds = %vector.body
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ret void
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; CORE2: Printing analysis 'Cost Model Analysis' for function 'test1':
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; CORE2: Cost Model: Found an estimated cost of 46 for instruction: %2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
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; COREI7: Printing analysis 'Cost Model Analysis' for function 'test1':
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; COREI7: Cost Model: Found an estimated cost of 1 for instruction: %2 = call <4 x float> @llvm.ceil.v4f32(<4 x float> %wide.load)
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}
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declare <4 x float> @llvm.ceil.v4f32(<4 x float>) nounwind readnone
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define void @test2(float* nocapture %f) nounwind {
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vector.ph:
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds float, float* %f, i64 %index
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%1 = bitcast float* %0 to <4 x float>*
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%wide.load = load <4 x float>, <4 x float>* %1, align 4
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%2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
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store <4 x float> %2, <4 x float>* %1, align 4
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%index.next = add i64 %index, 4
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%3 = icmp eq i64 %index.next, 1024
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br i1 %3, label %for.end, label %vector.body
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for.end: ; preds = %vector.body
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ret void
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; CORE2: Printing analysis 'Cost Model Analysis' for function 'test2':
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; CORE2: Cost Model: Found an estimated cost of 46 for instruction: %2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
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; COREI7: Printing analysis 'Cost Model Analysis' for function 'test2':
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; COREI7: Cost Model: Found an estimated cost of 1 for instruction: %2 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %wide.load)
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}
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declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>) nounwind readnone
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define void @test3(float* nocapture %f, <4 x float> %b, <4 x float> %c) nounwind {
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vector.ph:
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds float, float* %f, i64 %index
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%1 = bitcast float* %0 to <4 x float>*
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%wide.load = load <4 x float>, <4 x float>* %1, align 4
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%2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
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store <4 x float> %2, <4 x float>* %1, align 4
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%index.next = add i64 %index, 4
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%3 = icmp eq i64 %index.next, 1024
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br i1 %3, label %for.end, label %vector.body
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for.end: ; preds = %vector.body
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ret void
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; CORE2: Printing analysis 'Cost Model Analysis' for function 'test3':
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; CORE2: Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
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; COREI7: Printing analysis 'Cost Model Analysis' for function 'test3':
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; COREI7: Cost Model: Found an estimated cost of 2 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c)
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}
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declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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