RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
Code Issues Projects Releases Wiki Activity
25e9604ac4
llvm-mirror/lib/Target/AArch64
History
Paul Osmialowski 0fa09433f0 add support for -print-imm-hex for AArch64 
Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro,
but not all of them.

Implementation contains following rules:

- floating point immediates are always printed as decimal
- signed integer immediates are printed depends on flag settings
  (for negative values 'formatImm' macro prints the value as i.e -0x01
  which may be convenient when imm is an address or offset)
- logical immediates are always printed as hex
- the 64-bit immediate for advSIMD, encoded in "a🅱️c:d:e:f:g:h" is always printed as hex
- the 64-bit immedaite in exception generation instructions like:
  brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex
- the rest of immediates is printed depends on availability
  of -print-imm-hex

Signed-off-by: Maciej Gabka <maciej.gabka@arm.com>
Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com>

Differential Revision: http://reviews.llvm.org/D16929

llvm-svn: 269446
2016-05-13 18:00:09 +00:00
..
AsmParser [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
Disassembler Remove autoconf support 2016-01-26 21:29:08 +00:00
InstPrinter add support for -print-imm-hex for AArch64 2016-05-13 18:00:09 +00:00
MCTargetDesc [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64.h AArch64: avoid clobbering SP for dead MOVimm pseudos. 2016-04-01 23:14:52 +00:00
AArch64.td AArch64: remove CRC feature from Cyclone. 2016-02-24 18:10:17 +00:00
AArch64A53Fix835769.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64A57FPLoadBalancing.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64AddressTypePromotion.cpp Cleanup comments. NFC. 2016-05-02 14:50:30 +00:00
AArch64AdvSIMDScalarPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64AsmPrinter.cpp Clean up redundant copies of Triple objects. NFC 2015-06-16 15:44:21 +00:00
AArch64BranchRelaxation.cpp [AArch64] Fix typo. NFC. 2016-03-25 14:37:43 +00:00
AArch64CallingConvention.h Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td AArch64: Use a callee save registers for swiftself parameters 2016-04-13 21:43:16 +00:00
AArch64CallLowering.cpp [GlobalISel] Coding style and whitespace fixes 2016-04-14 17:23:33 +00:00
AArch64CallLowering.h [GlobalISel] Coding style and whitespace fixes 2016-04-14 17:23:33 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64CollectLOH.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64ConditionalCompares.cpp [AArch64] Remove unused MBP headers/dependency. NFC. 2016-05-05 20:58:38 +00:00
AArch64ConditionOptimizer.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64ExpandPseudoInsts.cpp livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFC 2016-05-03 00:24:32 +00:00
AArch64FastISel.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64FrameLowering.cpp [AArch64] Combine callee-save and local stack SP adjustment instructions. 2016-05-06 16:34:59 +00:00
AArch64FrameLowering.h [AArch64] Combine callee-save and local stack SP adjustment instructions. 2016-05-06 16:34:59 +00:00
AArch64InstrAtomics.td AArch64: expand cmpxchg after regalloc at -O0. 2016-04-14 17:03:29 +00:00
AArch64InstrFormats.td add support for -print-imm-hex for AArch64 2016-05-13 18:00:09 +00:00
AArch64InstrInfo.cpp [foldMemoryOperand()] Pass LiveIntervals to enable liveness check. 2016-05-10 08:09:37 +00:00
AArch64InstrInfo.h [foldMemoryOperand()] Pass LiveIntervals to enable liveness check. 2016-05-10 08:09:37 +00:00
AArch64InstrInfo.td [AArch64] Use the reciprocal estimation machinery 2016-05-04 20:18:27 +00:00
AArch64ISelDAGToDAG.cpp SDAG: Implement Select instead of SelectImpl in AArch64DAGToDAGISel 2016-05-12 23:10:30 +00:00
AArch64ISelLowering.cpp [AArch64] Remove command-line option use for testing. 2016-05-12 13:27:24 +00:00
AArch64ISelLowering.h [AArch64] Implement lowering of the X constraint on AArch64 2016-05-09 11:10:44 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Decouple zero store promotion from narrow ld merge. NFC. 2016-05-06 15:08:57 +00:00
AArch64MachineFunctionInfo.h [AArch64] Break the dependency between FP and SP when possible. 2016-03-14 18:17:41 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.cpp CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 2016-02-27 06:40:41 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64RedundantCopyElimination.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64RegisterBankInfo.cpp [RegisterBankInfo] Change the API for the verify methods. 2016-04-21 18:34:43 +00:00
AArch64RegisterBankInfo.h [AArch64] Teach RegisterBankInfo about the CC register bank. 2016-04-07 00:39:29 +00:00
AArch64RegisterInfo.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64RegisterInfo.h CXX_FAST_TLS calling convention: performance improvement for AArch64. 2015-12-16 21:04:19 +00:00
AArch64RegisterInfo.td Fix typo in comment. NFC 2016-04-24 17:55:57 +00:00
AArch64SchedA53.td Remove MinLatency in SchedMachineModel. NFC. 2016-04-26 00:37:46 +00:00
AArch64SchedA57.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SchedKryo.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedKryoDetails.td [AArch64] Add support for Qualcomm Kryo CPU. 2016-02-12 15:51:51 +00:00
AArch64SchedM1.td Remove MinLatency in SchedMachineModel. NFC. 2016-04-26 00:37:46 +00:00
AArch64Schedule.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SelectionDAGInfo.cpp [DAGCombiner] Follow coding convention for function name (NFC) 2016-04-27 17:27:16 +00:00
AArch64SelectionDAGInfo.h [DAGCombiner] Follow coding convention for function name (NFC) 2016-04-27 17:27:16 +00:00
AArch64StorePairSuppress.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64Subtarget.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64Subtarget.h [GlobalISel] Move GISelAccessor class into public headers 2016-04-14 17:45:38 +00:00
AArch64TargetMachine.cpp CodeGen: Move TargetPassConfig from Passes.h to an own header; NFC 2016-05-10 03:21:59 +00:00
AArch64TargetMachine.h [AArch64] Use the reciprocal estimation machinery 2016-05-04 20:18:27 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp Add parentheses to silence buildbot warning 2016-04-27 16:25:04 +00:00
AArch64TargetTransformInfo.h [TTI] Add hook for vector extract with extension 2016-04-27 15:20:21 +00:00
CMakeLists.txt [AArch64][CallLowering] Do not build the API if GlobalISel is not built. 2016-04-07 20:47:51 +00:00
LLVMBuild.txt [AArch64] Plug the beginning of the GlobalISel pipeline. 2016-02-11 19:35:06 +00:00