| .. |
|
AsmParser
|
[TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.h
|
2016-11-01 16:32:05 +00:00 |
|
Disassembler
|
AMDGPU: Whitespace fixes
|
2016-11-01 00:55:14 +00:00 |
|
InstPrinter
|
[AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.
|
2016-10-31 16:07:39 +00:00 |
|
MCTargetDesc
|
[AMDGPU] TargetStreamer: Fix .note section name
|
2016-11-11 13:41:52 +00:00 |
|
TargetInfo
|
Move the global variables representing each Target behind accessor function
|
2016-10-09 23:00:34 +00:00 |
|
Utils
|
AMDGPU/SI: Handle hazard with > 8 byte VMEM stores
|
2016-10-27 23:05:31 +00:00 |
|
AMDGPU.h
|
Move the global variables representing each Target behind accessor function
|
2016-10-09 23:00:34 +00:00 |
|
AMDGPU.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
AMDGPUAlwaysInlinePass.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDGPUAnnotateKernelFeatures.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDGPUAnnotateUniformValues.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDGPUAsmPrinter.cpp
|
AMDGPU: Emit runtime metadata as a note element in .note section
|
2016-11-10 21:18:49 +00:00 |
|
AMDGPUAsmPrinter.h
|
AMDGPU: Emit runtime metadata as a note element in .note section
|
2016-11-10 21:18:49 +00:00 |
|
AMDGPUCallingConv.td
|
AMDGPU: Fix kernel argument alignment impacting stack size
|
2016-06-18 05:15:53 +00:00 |
|
AMDGPUCallLowering.cpp
|
GlobalISel: pass Function to lowerFormalArguments directly (NFC).
|
2016-09-21 12:57:35 +00:00 |
|
AMDGPUCallLowering.h
|
GlobalISel: pass Function to lowerFormalArguments directly (NFC).
|
2016-09-21 12:57:35 +00:00 |
|
AMDGPUCodeGenPrepare.cpp
|
[AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
|
2016-10-07 14:39:53 +00:00 |
|
AMDGPUFrameLowering.cpp
|
MachineFunction: Return reference for getFrameInfo(); NFC
|
2016-07-28 18:40:00 +00:00 |
|
AMDGPUFrameLowering.h
|
AMDGPU: Move R600 only pieces into R600 classes
|
2016-07-09 18:11:15 +00:00 |
|
AMDGPUInstrInfo.cpp
|
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
|
2016-10-07 14:46:06 +00:00 |
|
AMDGPUInstrInfo.h
|
[AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
|
2016-10-07 14:46:06 +00:00 |
|
AMDGPUInstrInfo.td
|
AMDGPU: Select mulhi 24-bit instructions
|
2016-08-27 01:32:27 +00:00 |
|
AMDGPUInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
AMDGPUIntrinsicInfo.cpp
|
AMDGPU: Change fdiv lowering based on !fpmath metadata
|
2016-07-19 23:16:53 +00:00 |
|
AMDGPUIntrinsicInfo.h
|
AMDGPU: Change fdiv lowering based on !fpmath metadata
|
2016-07-19 23:16:53 +00:00 |
|
AMDGPUIntrinsics.td
|
AMDGPU: Remove read_workdim intrinsic
|
2016-07-25 20:17:02 +00:00 |
|
AMDGPUISelDAGToDAG.cpp
|
AMDGPU: Remove unnecessary and on conditional branch
|
2016-11-07 19:09:33 +00:00 |
|
AMDGPUISelLowering.cpp
|
Revert "[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies"
|
2016-11-11 00:22:34 +00:00 |
|
AMDGPUISelLowering.h
|
[DAG Combiner] Fix the native computation of the Newton series for reciprocals
|
2016-11-10 23:31:06 +00:00 |
|
AMDGPUMachineFunction.cpp
|
AMDGPU: Make AMDGPUMachineFunction fields private
|
2016-07-26 16:45:58 +00:00 |
|
AMDGPUMachineFunction.h
|
AMDGPU: Make AMDGPUMachineFunction fields private
|
2016-07-26 16:45:58 +00:00 |
|
AMDGPUMCInstLower.cpp
|
[AMDGPU] Emit 32-bit lo/hi got and pc relative variant kinds for external and global address space variables
|
2016-10-14 04:37:34 +00:00 |
|
AMDGPUMCInstLower.h
|
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
|
2016-10-06 17:19:11 +00:00 |
|
AMDGPUOpenCLImageTypeLoweringPass.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDGPUPromoteAlloca.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDGPUPTNote.h
|
AMDGPU: Emit runtime metadata as a note element in .note section
|
2016-11-10 21:18:49 +00:00 |
|
AMDGPURegisterInfo.cpp
|
AMDGPU: Move R600 only pieces into R600 classes
|
2016-07-09 18:11:15 +00:00 |
|
AMDGPURegisterInfo.h
|
AMDGPU: Move R600 only pieces into R600 classes
|
2016-07-09 18:11:15 +00:00 |
|
AMDGPURegisterInfo.td
|
|
|
|
AMDGPURuntimeMetadata.h
|
AMDGPU: Attempt to fix build failure on x86-64 selfhost build
|
2016-11-11 02:48:50 +00:00 |
|
AMDGPUSubtarget.cpp
|
AMDGPU: Use 1/2pi inline imm on VI
|
2016-10-29 04:05:06 +00:00 |
|
AMDGPUSubtarget.h
|
[AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32
|
2016-11-01 17:49:33 +00:00 |
|
AMDGPUTargetMachine.cpp
|
Move the global variables representing each Target behind accessor function
|
2016-10-09 23:00:34 +00:00 |
|
AMDGPUTargetMachine.h
|
AMDGPU: Delete more dead code
|
2016-07-22 17:01:25 +00:00 |
|
AMDGPUTargetObjectFile.cpp
|
Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
|
2016-10-24 19:23:39 +00:00 |
|
AMDGPUTargetObjectFile.h
|
Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
|
2016-10-24 19:23:39 +00:00 |
|
AMDGPUTargetTransformInfo.cpp
|
Add new target hooks for LoadStoreVectorizer
|
2016-10-03 10:31:34 +00:00 |
|
AMDGPUTargetTransformInfo.h
|
Do a sweep over move ctors and remove those that are identical to the default.
|
2016-10-20 12:20:28 +00:00 |
|
AMDILCFGStructurizer.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
AMDKernelCodeT.h
|
|
|
|
BUFInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
CaymanInstructions.td
|
AMDGPU: Select mulhi 24-bit instructions
|
2016-08-27 01:32:27 +00:00 |
|
CIInstructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
CMakeLists.txt
|
Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
|
2016-10-06 17:19:11 +00:00 |
|
DSInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
EvergreenInstructions.td
|
AMDGPU: Select mulhi 24-bit instructions
|
2016-08-27 01:32:27 +00:00 |
|
FLATInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
GCNHazardRecognizer.cpp
|
AMDGPU/SI: Handle hazard with s_rfe_b64
|
2016-10-27 23:50:21 +00:00 |
|
GCNHazardRecognizer.h
|
AMDGPU/SI: Handle hazard with s_rfe_b64
|
2016-10-27 23:50:21 +00:00 |
|
GCNSchedStrategy.cpp
|
AMDGPU: Whitespace fixes
|
2016-11-01 00:55:14 +00:00 |
|
GCNSchedStrategy.h
|
AMDGPU/SI: Implement a custom MachineSchedStrategy
|
2016-08-29 19:42:52 +00:00 |
|
LLVMBuild.txt
|
AMDGPU: Prune AMDGPUAsmParser in libdeps.
|
2016-07-09 07:54:27 +00:00 |
|
MIMGInstructions.td
|
AMDGPU: Rename glc operand type
|
2016-10-28 21:55:08 +00:00 |
|
Processors.td
|
AMDGPU: Refactor processor definition to use ISA version features
|
2016-10-26 16:37:56 +00:00 |
|
R600ClauseMergePass.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600ControlFlowFinalizer.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600Defines.h
|
|
|
|
R600EmitClauseMarkers.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600ExpandSpecialInstrs.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600FrameLowering.cpp
|
AMDGPU: Cleanup subtarget handling.
|
2016-06-24 06:30:11 +00:00 |
|
R600FrameLowering.h
|
AMDGPU: Cleanup subtarget handling.
|
2016-06-24 06:30:11 +00:00 |
|
R600InstrFormats.td
|
AMDGPU/R600: Convert buffer id to VTX_READ input
|
2016-08-15 21:38:30 +00:00 |
|
R600InstrInfo.cpp
|
Finish renaming remaining analyzeBranch functions
|
2016-09-14 20:43:16 +00:00 |
|
R600InstrInfo.h
|
Finish renaming remaining analyzeBranch functions
|
2016-09-14 20:43:16 +00:00 |
|
R600Instructions.td
|
Target: Remove unused patterns and transforms. NFC.
|
2016-10-07 00:30:49 +00:00 |
|
R600Intrinsics.td
|
AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
|
2016-07-15 21:27:08 +00:00 |
|
R600ISelLowering.cpp
|
AMDGPU: Refactor kernel argument lowering
|
2016-09-16 21:53:00 +00:00 |
|
R600ISelLowering.h
|
AMDGPU: Fix i1 fp_to_int
|
2016-07-22 17:01:21 +00:00 |
|
R600MachineFunctionInfo.cpp
|
AMDGPU: Delete more dead code
|
2016-07-22 17:01:25 +00:00 |
|
R600MachineFunctionInfo.h
|
AMDGPU: Delete more dead code
|
2016-07-22 17:01:25 +00:00 |
|
R600MachineScheduler.cpp
|
CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
|
2016-06-30 00:01:54 +00:00 |
|
R600MachineScheduler.h
|
AMDGPU: Cleanup subtarget handling.
|
2016-06-24 06:30:11 +00:00 |
|
R600OptimizeVectorRegisters.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600Packetizer.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
R600RegisterInfo.cpp
|
AMDGPU: Move R600 only pieces into R600 classes
|
2016-07-09 18:11:15 +00:00 |
|
R600RegisterInfo.h
|
AMDGPU: Move R600 only pieces into R600 classes
|
2016-07-09 18:11:15 +00:00 |
|
R600RegisterInfo.td
|
|
|
|
R600Schedule.td
|
AMDGPU: Fix trailing whitespace
|
2016-06-10 02:18:02 +00:00 |
|
R700Instructions.td
|
|
|
|
SIAnnotateControlFlow.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIDebuggerInsertNops.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIDefines.h
|
AMDGPU: Workaround for instruction size with literals
|
2016-11-01 20:42:24 +00:00 |
|
SIFixControlFlowLiveIntervals.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIFixSGPRCopies.cpp
|
AMDGPU/SI: Fix visit order assumption in SIFixSGPRCopies
|
2016-11-11 23:35:42 +00:00 |
|
SIFoldOperands.cpp
|
AMDGPU: Don't fold undef uses or copies with implicit uses
|
2016-10-06 18:12:13 +00:00 |
|
SIFrameLowering.cpp
|
AMDGPU: Fix using incorrect private resource with no allocation
|
2016-10-28 19:43:31 +00:00 |
|
SIFrameLowering.h
|
AMDGPU: Refactor frame lowering
|
2016-08-31 21:52:21 +00:00 |
|
SIInsertSkips.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIInsertWaits.cpp
|
AMDGPU: Preserve vcc undef flags when inverting branch
|
2016-11-07 19:09:27 +00:00 |
|
SIInstrFormats.td
|
AMDGPU: Workaround for instruction size with literals
|
2016-11-01 20:42:24 +00:00 |
|
SIInstrInfo.cpp
|
AMDGPU: Preserve vcc undef flags when inverting branch
|
2016-11-07 19:09:27 +00:00 |
|
SIInstrInfo.h
|
AMDGPU: Workaround for instruction size with literals
|
2016-11-01 20:42:24 +00:00 |
|
SIInstrInfo.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
SIInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
SIIntrinsics.td
|
AMDGPU: Allow some control flow intrinsics to be CSEd
|
2016-09-16 22:11:18 +00:00 |
|
SIISelLowering.cpp
|
AMDGPU/SI: Promote i16 = fp_[us]int f32 for VI
|
2016-11-12 00:19:11 +00:00 |
|
SIISelLowering.h
|
[AMDGPU] Emit constant address space data in .rodata section and use relocations instead of fixups (amdhsa only)
|
2016-10-20 18:12:38 +00:00 |
|
SILoadStoreOptimizer.cpp
|
[AMDGPU][CodeGen] To improve CGEMM performance: combine LDS reads.
|
2016-11-03 14:37:13 +00:00 |
|
SILowerControlFlow.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SILowerI1Copies.cpp
|
Revert "[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies"
|
2016-11-11 00:22:34 +00:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU/SI: Add support for triples with the mesa3d operating system
|
2016-09-16 21:34:26 +00:00 |
|
SIMachineFunctionInfo.h
|
[AMDGPU] Wave and register controls
|
2016-09-06 20:22:28 +00:00 |
|
SIMachineScheduler.cpp
|
AMDGPU/SI: Use a better method for determining the largest pressure sets
|
2016-08-26 21:16:37 +00:00 |
|
SIMachineScheduler.h
|
|
|
|
SIOptimizeExecMasking.cpp
|
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
|
2016-10-07 08:40:14 +00:00 |
|
SIRegisterInfo.cpp
|
AMDGPU: Try to fix (non-clang?) bot builds
|
2016-11-07 16:52:50 +00:00 |
|
SIRegisterInfo.h
|
AMDGPU: Refactor copyPhysReg
|
2016-11-07 16:39:22 +00:00 |
|
SIRegisterInfo.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
SISchedule.td
|
AMDGPU/SI: Implement a custom MachineSchedStrategy
|
2016-08-29 19:42:52 +00:00 |
|
SIShrinkInstructions.cpp
|
AMDGPU: Use brev for materializing SGPR constants
|
2016-11-01 23:14:20 +00:00 |
|
SITypeRewriter.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SIWholeQuadMode.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
|
SMInstructions.td
|
[AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions.
|
2016-10-31 16:07:39 +00:00 |
|
SOPInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VIInstrFormats.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
|
VIInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VOP1Instructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VOP2Instructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VOP3Instructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
|
VOPCInstructions.td
|
AMDGPU: Use unsigned compare for eq/ne
|
2016-09-30 01:50:20 +00:00 |
|
VOPInstructions.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
57da18085b