1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 20:12:56 +02:00
llvm-mirror/test/MC/Disassembler/Hexagon
2014-12-30 15:44:17 +00:00
..
alu32_alu.txt [Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. 2014-12-30 15:44:17 +00:00
alu32_perm.txt [Hexagon] Adding combine ri/ir instructions. 2014-12-10 22:23:07 +00:00
alu32_pred.txt [Hexagon] Updating constant extender def, adding alu-not instructions, compare to general register, and inverted compares. 2014-12-30 15:44:17 +00:00
cr.txt [Hexagon] Adding transfers to and from control registers. 2014-12-19 19:06:32 +00:00
j.txt [Hexagon] Adding J class call instructions. 2014-12-12 21:12:27 +00:00
jr.txt [Hexagon] Adding encodings for JR class instructions. Updating complier usages. 2014-12-10 21:24:10 +00:00
ld.txt [Hexagon] Adding auto-incrementing loads with and without byte reversal. 2014-12-26 21:09:25 +00:00
lit.local.cfg [Hexagon] Adding lit exception if Hexagon isn't built. 2014-12-04 04:28:38 +00:00
st.txt [Hexagon] Adding allocframe, post-increment circular immediate stores, post-increment circular register stores, and bit reversed post-increment stores. 2014-12-29 21:33:45 +00:00
system_user.txt [Hexagon] Adding locked loads. 2014-12-26 20:42:27 +00:00
xtype_alu.txt [Hexagon] Adding asr/lsr/asl reg/imm, asl with saturation, asr with rounding. Doubleword abs/neg/not. Interleave and deinterleave instructions. 2014-12-16 20:40:23 +00:00
xtype_bit.txt [Hexagon] Adding bit extraction and table indexing instructions. 2014-12-19 20:01:08 +00:00
xtype_mpy.txt [Hexagon] Adding doubleword multiplies with and without accumulation. 2014-12-16 00:07:24 +00:00
xtype_perm.txt [Hexagon] Adding saturate and swizzle instructions. 2014-12-16 16:27:17 +00:00
xtype_pred.txt [Hexagon] Adding tstbit/bitclr/bitset instructions. 2014-12-16 21:28:58 +00:00
xtype_shift.txt [Hexagon] Adding more xtype shift instructions. 2014-12-19 19:51:35 +00:00