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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
llvm-mirror/test/CodeGen
2016-03-01 21:43:55 +00:00
..
AArch64 Revert "[AArch64] Fix isLegalAddImmediate() to return true for valid negative values." 2016-03-01 20:28:52 +00:00
AMDGPU DAGCombiner: Turn truncate of a bitcasted vector to an extract 2016-03-01 21:31:53 +00:00
ARM ARM: sink atomic release barrier as far as possible into cmpxchg. 2016-02-22 20:55:50 +00:00
BPF
CPP
Generic Move test/CodeGen/Generic/pr26652.ll to test/CodeGen/X86/pr26652.ll and test it only on X86. 2016-02-25 00:12:18 +00:00
Hexagon Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
Inputs
Mips Revert "[mips] Promote the result of SETCC nodes to GPR width." 2016-03-01 20:25:43 +00:00
MIR When printing MIR, output to errs() rather than outs(). 2016-02-19 00:18:46 +00:00
MSP430 MSP430InstrInfo::loadRegFromStackSlot forgets to set register def. 2016-02-24 15:15:02 +00:00
NVPTX [NVPTX] Use different, convergent MIs for convergent calls. 2016-03-01 19:24:03 +00:00
PowerPC Fix for PR26180 2016-02-29 16:42:27 +00:00
SPARC Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
SystemZ [SystemZ] Fix ABI for i128 argument and return types 2016-02-19 14:10:21 +00:00
Thumb Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT. 2016-02-26 19:40:34 +00:00
Thumb2
WebAssembly WebAssembly: fix test 2016-02-28 15:44:54 +00:00
WinEH [WinEH] Make setjmp work correctly with EH 2016-02-29 19:16:03 +00:00
X86 [X86][AVX2] Regenerated horizontal add/sub tests 2016-03-01 21:43:55 +00:00
XCore