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3774e2781f
This patch adds support for the fptoui.sat and fptosi.sat intrinsics, which provide basically the same functionality as the existing fptoui and fptosi instructions, but will saturate (or return 0 for NaN) on values unrepresentable in the target type, instead of returning poison. Related mailing list discussion can be found at: https://groups.google.com/d/msg/llvm-dev/cgDFaBmCnDQ/CZAIMj4IBAAJ The intrinsics have overloaded source and result type and support vector operands: i32 @llvm.fptoui.sat.i32.f32(float %f) i100 @llvm.fptoui.sat.i100.f64(double %f) <4 x i32> @llvm.fptoui.sat.v4i32.v4f16(half %f) // etc On the SelectionDAG layer two new ISD opcodes are added, FP_TO_UINT_SAT and FP_TO_SINT_SAT. These opcodes have two operands and one result. The second operand is an integer constant specifying the scalar saturation width. The idea here is that initially the second operand and the scalar width of the result type are the same, but they may change during type legalization. For example: i19 @llvm.fptsi.sat.i19.f32(float %f) // builds i19 fp_to_sint_sat f, 19 // type legalizes (through integer result promotion) i32 fp_to_sint_sat f, 19 I went for this approach, because saturated conversion does not compose well. There is no good way of "adjusting" a saturating conversion to i32 into one to i19 short of saturating twice. Specifying the saturation width separately allows directly saturating to the correct width. There are two baseline expansions for the fp_to_xint_sat opcodes. If the integer bounds can be exactly represented in the float type and fminnum/fmaxnum are legal, we can expand to something like: f = fmaxnum f, FP(MIN) f = fminnum f, FP(MAX) i = fptoxi f i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN If the bounds cannot be exactly represented, we expand to something like this instead: i = fptoxi f i = select f ult FP(MIN), MIN, i i = select f ogt FP(MAX), MAX, i i = select f uo f, 0, i # unnecessary if unsigned as 0 = MIN It should be noted that this expansion assumes a non-trapping fptoxi. Initial tests are for AArch64, x86_64 and ARM. This exercises all of the scalar and vector legalization. ARM is included to test float softening. Original patch by @nikic and @ebevhan (based on D54696). Differential Revision: https://reviews.llvm.org/D54749
2808 lines
98 KiB
LLVM
2808 lines
98 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64 < %s | FileCheck %s
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;
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; Float to signed 32-bit -- Vector size variation
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;
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declare <1 x i32> @llvm.fptosi.sat.v1f32.v1i32 (<1 x float>)
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declare <2 x i32> @llvm.fptosi.sat.v2f32.v2i32 (<2 x float>)
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declare <3 x i32> @llvm.fptosi.sat.v3f32.v3i32 (<3 x float>)
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declare <4 x i32> @llvm.fptosi.sat.v4f32.v4i32 (<4 x float>)
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declare <5 x i32> @llvm.fptosi.sat.v5f32.v5i32 (<5 x float>)
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declare <6 x i32> @llvm.fptosi.sat.v6f32.v6i32 (<6 x float>)
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declare <7 x i32> @llvm.fptosi.sat.v7f32.v7i32 (<7 x float>)
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declare <8 x i32> @llvm.fptosi.sat.v8f32.v8i32 (<8 x float>)
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define <1 x i32> @test_signed_v1f32_v1i32(<1 x float> %f) {
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; CHECK-LABEL: test_signed_v1f32_v1i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-822083584
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: mov s1, v0.s[1]
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; CHECK-NEXT: mov w10, #1325400063
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; CHECK-NEXT: fmov s2, w8
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; CHECK-NEXT: mov w9, #-2147483648
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; CHECK-NEXT: fmov s3, w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov w11, #2147483647
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; CHECK-NEXT: csel w10, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s3
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; CHECK-NEXT: csel w10, w11, w10, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: csel w10, wzr, w10, vs
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; CHECK-NEXT: fcmp s0, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s0, s3
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: mov v0.s[1], w10
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NEXT: ret
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%x = call <1 x i32> @llvm.fptosi.sat.v1f32.v1i32(<1 x float> %f)
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ret <1 x i32> %x
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}
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define <2 x i32> @test_signed_v2f32_v2i32(<2 x float> %f) {
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; CHECK-LABEL: test_signed_v2f32_v2i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-822083584
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: mov s1, v0.s[1]
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; CHECK-NEXT: mov w10, #1325400063
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; CHECK-NEXT: fmov s2, w8
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; CHECK-NEXT: mov w9, #-2147483648
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; CHECK-NEXT: fmov s3, w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov w11, #2147483647
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; CHECK-NEXT: csel w10, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s3
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; CHECK-NEXT: csel w10, w11, w10, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: csel w10, wzr, w10, vs
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; CHECK-NEXT: fcmp s0, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s0, s3
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: mov v0.s[1], w10
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NEXT: ret
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%x = call <2 x i32> @llvm.fptosi.sat.v2f32.v2i32(<2 x float> %f)
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ret <2 x i32> %x
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}
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define <3 x i32> @test_signed_v3f32_v3i32(<3 x float> %f) {
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; CHECK-LABEL: test_signed_v3f32_v3i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-822083584
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; CHECK-NEXT: mov s1, v0.s[1]
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; CHECK-NEXT: mov w10, #1325400063
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; CHECK-NEXT: fmov s2, w8
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; CHECK-NEXT: mov w9, #-2147483648
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; CHECK-NEXT: fmov s4, w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov w11, #2147483647
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; CHECK-NEXT: csel w10, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s4
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; CHECK-NEXT: csel w10, w11, w10, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: csel w10, wzr, w10, vs
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; CHECK-NEXT: fcmp s0, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s0, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: mov s3, v0.s[2]
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: mov s1, v0.s[3]
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: fcvtzs w8, s3
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; CHECK-NEXT: fcmp s3, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s3, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s3, s3
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; CHECK-NEXT: mov v0.s[1], w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov v0.s[2], w8
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; CHECK-NEXT: csel w8, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: mov v0.s[3], w8
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; CHECK-NEXT: ret
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%x = call <3 x i32> @llvm.fptosi.sat.v3f32.v3i32(<3 x float> %f)
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ret <3 x i32> %x
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}
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define <4 x i32> @test_signed_v4f32_v4i32(<4 x float> %f) {
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; CHECK-LABEL: test_signed_v4f32_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-822083584
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; CHECK-NEXT: mov s1, v0.s[1]
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; CHECK-NEXT: mov w10, #1325400063
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; CHECK-NEXT: fmov s2, w8
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; CHECK-NEXT: mov w9, #-2147483648
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; CHECK-NEXT: fmov s4, w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov w11, #2147483647
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; CHECK-NEXT: csel w10, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s4
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; CHECK-NEXT: csel w10, w11, w10, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: csel w10, wzr, w10, vs
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; CHECK-NEXT: fcmp s0, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s0, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: mov s3, v0.s[2]
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: mov s1, v0.s[3]
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; CHECK-NEXT: fmov s0, w8
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; CHECK-NEXT: fcvtzs w8, s3
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; CHECK-NEXT: fcmp s3, s2
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; CHECK-NEXT: csel w8, w9, w8, lt
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; CHECK-NEXT: fcmp s3, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s3, s3
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; CHECK-NEXT: mov v0.s[1], w10
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; CHECK-NEXT: fcvtzs w10, s1
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fcmp s1, s2
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; CHECK-NEXT: mov v0.s[2], w8
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; CHECK-NEXT: csel w8, w9, w10, lt
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; CHECK-NEXT: fcmp s1, s4
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; CHECK-NEXT: csel w8, w11, w8, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: mov v0.s[3], w8
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; CHECK-NEXT: ret
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%x = call <4 x i32> @llvm.fptosi.sat.v4f32.v4i32(<4 x float> %f)
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ret <4 x i32> %x
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}
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define <5 x i32> @test_signed_v5f32_v5i32(<5 x float> %f) {
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; CHECK-LABEL: test_signed_v5f32_v5i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w9, #-822083584
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; CHECK-NEXT: mov w11, #1325400063
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; CHECK-NEXT: fmov s5, w9
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: mov w10, #-2147483648
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; CHECK-NEXT: fmov s6, w11
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; CHECK-NEXT: fcmp s0, s5
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; CHECK-NEXT: mov w12, #2147483647
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; CHECK-NEXT: csel w8, w10, w8, lt
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; CHECK-NEXT: fcmp s0, s6
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: fcvtzs w13, s1
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; CHECK-NEXT: csel w0, wzr, w8, vs
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; CHECK-NEXT: fcmp s1, s5
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; CHECK-NEXT: csel w8, w10, w13, lt
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; CHECK-NEXT: fcmp s1, s6
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w14, s2
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; CHECK-NEXT: csel w1, wzr, w8, vs
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; CHECK-NEXT: fcmp s2, s5
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; CHECK-NEXT: csel w8, w10, w14, lt
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; CHECK-NEXT: fcmp s2, s6
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s2, s2
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; CHECK-NEXT: fcvtzs w9, s3
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; CHECK-NEXT: csel w2, wzr, w8, vs
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; CHECK-NEXT: fcmp s3, s5
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; CHECK-NEXT: csel w8, w10, w9, lt
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; CHECK-NEXT: fcmp s3, s6
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s3, s3
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; CHECK-NEXT: fcvtzs w11, s4
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; CHECK-NEXT: csel w3, wzr, w8, vs
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; CHECK-NEXT: fcmp s4, s5
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; CHECK-NEXT: csel w8, w10, w11, lt
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; CHECK-NEXT: fcmp s4, s6
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s4, s4
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; CHECK-NEXT: csel w4, wzr, w8, vs
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; CHECK-NEXT: ret
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%x = call <5 x i32> @llvm.fptosi.sat.v5f32.v5i32(<5 x float> %f)
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ret <5 x i32> %x
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}
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define <6 x i32> @test_signed_v6f32_v6i32(<6 x float> %f) {
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; CHECK-LABEL: test_signed_v6f32_v6i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w9, #-822083584
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; CHECK-NEXT: mov w11, #1325400063
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; CHECK-NEXT: fmov s6, w9
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; CHECK-NEXT: fcvtzs w8, s5
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; CHECK-NEXT: mov w10, #-2147483648
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; CHECK-NEXT: fcmp s5, s6
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; CHECK-NEXT: fmov s7, w11
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; CHECK-NEXT: mov w12, #2147483647
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; CHECK-NEXT: csel w8, w10, w8, lt
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; CHECK-NEXT: fcmp s5, s7
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s5, s5
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; CHECK-NEXT: fcvtzs w13, s4
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; CHECK-NEXT: csel w5, wzr, w8, vs
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; CHECK-NEXT: fcmp s4, s6
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; CHECK-NEXT: csel w8, w10, w13, lt
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; CHECK-NEXT: fcmp s4, s7
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s4, s4
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; CHECK-NEXT: fcvtzs w14, s0
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fcmp s0, s6
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; CHECK-NEXT: csel w13, w10, w14, lt
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; CHECK-NEXT: fcmp s0, s7
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; CHECK-NEXT: csel w13, w12, w13, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: fcvtzs w9, s1
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; CHECK-NEXT: csel w0, wzr, w13, vs
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; CHECK-NEXT: fcmp s1, s6
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; CHECK-NEXT: csel w9, w10, w9, lt
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; CHECK-NEXT: fcmp s1, s7
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; CHECK-NEXT: csel w9, w12, w9, gt
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; CHECK-NEXT: fcmp s1, s1
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; CHECK-NEXT: fcvtzs w11, s2
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; CHECK-NEXT: csel w1, wzr, w9, vs
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; CHECK-NEXT: fcmp s2, s6
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; CHECK-NEXT: csel w9, w10, w11, lt
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; CHECK-NEXT: fcmp s2, s7
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; CHECK-NEXT: csel w9, w12, w9, gt
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; CHECK-NEXT: fcmp s2, s2
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; CHECK-NEXT: fmov s4, w8
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; CHECK-NEXT: fcvtzs w8, s3
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; CHECK-NEXT: csel w2, wzr, w9, vs
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; CHECK-NEXT: fcmp s3, s6
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; CHECK-NEXT: csel w8, w10, w8, lt
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; CHECK-NEXT: fcmp s3, s7
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; CHECK-NEXT: mov v4.s[1], w5
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s3, s3
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; CHECK-NEXT: csel w3, wzr, w8, vs
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; CHECK-NEXT: fmov w4, s4
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; CHECK-NEXT: ret
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%x = call <6 x i32> @llvm.fptosi.sat.v6f32.v6i32(<6 x float> %f)
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ret <6 x i32> %x
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}
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define <7 x i32> @test_signed_v7f32_v7i32(<7 x float> %f) {
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; CHECK-LABEL: test_signed_v7f32_v7i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w9, #-822083584
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; CHECK-NEXT: mov w11, #1325400063
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; CHECK-NEXT: fmov s7, w9
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; CHECK-NEXT: fcvtzs w8, s5
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; CHECK-NEXT: mov w10, #-2147483648
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; CHECK-NEXT: fcmp s5, s7
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; CHECK-NEXT: fmov s16, w11
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; CHECK-NEXT: mov w12, #2147483647
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; CHECK-NEXT: csel w8, w10, w8, lt
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; CHECK-NEXT: fcmp s5, s16
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; CHECK-NEXT: csel w8, w12, w8, gt
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; CHECK-NEXT: fcmp s5, s5
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; CHECK-NEXT: fcvtzs w13, s4
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; CHECK-NEXT: csel w8, wzr, w8, vs
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; CHECK-NEXT: fcmp s4, s7
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; CHECK-NEXT: csel w11, w10, w13, lt
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; CHECK-NEXT: fcmp s4, s16
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; CHECK-NEXT: csel w11, w12, w11, gt
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; CHECK-NEXT: fcmp s4, s4
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; CHECK-NEXT: fcvtzs w14, s6
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; CHECK-NEXT: csel w11, wzr, w11, vs
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; CHECK-NEXT: fcmp s6, s7
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; CHECK-NEXT: csel w14, w10, w14, lt
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; CHECK-NEXT: fcmp s6, s16
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; CHECK-NEXT: csel w14, w12, w14, gt
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; CHECK-NEXT: fcmp s6, s6
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; CHECK-NEXT: fcvtzs w9, s0
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; CHECK-NEXT: csel w6, wzr, w14, vs
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; CHECK-NEXT: fcmp s0, s7
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; CHECK-NEXT: csel w9, w10, w9, lt
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; CHECK-NEXT: fcmp s0, s16
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; CHECK-NEXT: csel w9, w12, w9, gt
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; CHECK-NEXT: fcmp s0, s0
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; CHECK-NEXT: fcvtzs w13, s1
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; CHECK-NEXT: csel w0, wzr, w9, vs
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; CHECK-NEXT: fcmp s1, s7
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; CHECK-NEXT: csel w9, w10, w13, lt
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; CHECK-NEXT: fcmp s1, s16
|
|
; CHECK-NEXT: csel w9, w12, w9, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmov s4, w11
|
|
; CHECK-NEXT: fcvtzs w11, s2
|
|
; CHECK-NEXT: csel w1, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s2, s7
|
|
; CHECK-NEXT: csel w9, w10, w11, lt
|
|
; CHECK-NEXT: fcmp s2, s16
|
|
; CHECK-NEXT: csel w9, w12, w9, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov v4.s[1], w8
|
|
; CHECK-NEXT: fcvtzs w8, s3
|
|
; CHECK-NEXT: csel w2, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s3, s7
|
|
; CHECK-NEXT: csel w8, w10, w8, lt
|
|
; CHECK-NEXT: fcmp s3, s16
|
|
; CHECK-NEXT: mov v4.s[2], w6
|
|
; CHECK-NEXT: csel w8, w12, w8, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: csel w3, wzr, w8, vs
|
|
; CHECK-NEXT: mov w5, v4.s[1]
|
|
; CHECK-NEXT: fmov w4, s4
|
|
; CHECK-NEXT: ret
|
|
%x = call <7 x i32> @llvm.fptosi.sat.v7f32.v7i32(<7 x float> %f)
|
|
ret <7 x i32> %x
|
|
}
|
|
|
|
define <8 x i32> @test_signed_v8f32_v8i32(<8 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v8f32_v8i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w10, #-822083584
|
|
; CHECK-NEXT: mov s3, v0.s[1]
|
|
; CHECK-NEXT: mov w11, #1325400063
|
|
; CHECK-NEXT: fmov s2, w10
|
|
; CHECK-NEXT: mov w8, #-2147483648
|
|
; CHECK-NEXT: fmov s5, w11
|
|
; CHECK-NEXT: fcvtzs w11, s3
|
|
; CHECK-NEXT: fcmp s3, s2
|
|
; CHECK-NEXT: mov w9, #2147483647
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s3, s5
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: fcvtzs w10, s0
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s0, s5
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: mov s4, v0.s[2]
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: mov s3, v0.s[3]
|
|
; CHECK-NEXT: fmov s0, w10
|
|
; CHECK-NEXT: fcvtzs w10, s4
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s4, s5
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: mov v0.s[1], w11
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: mov v0.s[2], w10
|
|
; CHECK-NEXT: fcvtzs w10, s3
|
|
; CHECK-NEXT: fcmp s3, s2
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s3, s5
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: mov s4, v1.s[1]
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: mov v0.s[3], w10
|
|
; CHECK-NEXT: fcvtzs w10, s4
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s4, s5
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fcvtzs w11, s1
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s1, s5
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov s3, v1.s[2]
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: mov s4, v1.s[3]
|
|
; CHECK-NEXT: fmov s1, w11
|
|
; CHECK-NEXT: fcvtzs w11, s3
|
|
; CHECK-NEXT: fcmp s3, s2
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s3, s5
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: mov v1.s[1], w10
|
|
; CHECK-NEXT: fcvtzs w10, s4
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: csel w8, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s4, s5
|
|
; CHECK-NEXT: csel w8, w9, w8, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: mov v1.s[2], w11
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v1.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <8 x i32> @llvm.fptosi.sat.v8f32.v8i32(<8 x float> %f)
|
|
ret <8 x i32> %x
|
|
}
|
|
|
|
;
|
|
; Double to signed 32-bit -- Vector size variation
|
|
;
|
|
|
|
declare <1 x i32> @llvm.fptosi.sat.v1f64.v1i32 (<1 x double>)
|
|
declare <2 x i32> @llvm.fptosi.sat.v2f64.v2i32 (<2 x double>)
|
|
declare <3 x i32> @llvm.fptosi.sat.v3f64.v3i32 (<3 x double>)
|
|
declare <4 x i32> @llvm.fptosi.sat.v4f64.v4i32 (<4 x double>)
|
|
declare <5 x i32> @llvm.fptosi.sat.v5f64.v5i32 (<5 x double>)
|
|
declare <6 x i32> @llvm.fptosi.sat.v6f64.v6i32 (<6 x double>)
|
|
|
|
define <1 x i32> @test_signed_v1f64_v1i32(<1 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v1f64_v1i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d1, x8
|
|
; CHECK-NEXT: fmaxnm d1, d0, d1
|
|
; CHECK-NEXT: fmov d2, x9
|
|
; CHECK-NEXT: fminnm d1, d1, d2
|
|
; CHECK-NEXT: fcvtzs w8, d1
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <1 x i32> @llvm.fptosi.sat.v1f64.v1i32(<1 x double> %f)
|
|
ret <1 x i32> %x
|
|
}
|
|
|
|
define <2 x i32> @test_signed_v2f64_v2i32(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
|
|
ret <2 x i32> %x
|
|
}
|
|
|
|
define <3 x i32> @test_signed_v3f64_v3i32(<3 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v3f64_v3i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d3, x8
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d1, d3
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fmaxnm d5, d0, d3
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d1
|
|
; CHECK-NEXT: fminnm d5, d5, d4
|
|
; CHECK-NEXT: fcvtzs w9, d5
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: fmaxnm d1, d2, d3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmaxnm d3, d3, d0
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: fminnm d3, d3, d4
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: fcmp d2, d2
|
|
; CHECK-NEXT: fcvtzs w8, d3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: mov v0.s[2], w9
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <3 x i32> @llvm.fptosi.sat.v3f64.v3i32(<3 x double> %f)
|
|
ret <3 x i32> %x
|
|
}
|
|
|
|
define <4 x i32> @test_signed_v4f64_v4i32(<4 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v4f64_v4i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: mov d2, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d4, x8
|
|
; CHECK-NEXT: fmaxnm d5, d2, d4
|
|
; CHECK-NEXT: fcmp d2, d2
|
|
; CHECK-NEXT: fmov d2, x9
|
|
; CHECK-NEXT: fminnm d5, d5, d2
|
|
; CHECK-NEXT: fcvtzs w8, d5
|
|
; CHECK-NEXT: fmaxnm d5, d0, d4
|
|
; CHECK-NEXT: fminnm d5, d5, d2
|
|
; CHECK-NEXT: mov d3, v1.d[1]
|
|
; CHECK-NEXT: fcvtzs w9, d5
|
|
; CHECK-NEXT: fmaxnm d5, d1, d4
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: fmaxnm d4, d3, d4
|
|
; CHECK-NEXT: fminnm d5, d5, d2
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fminnm d2, d4, d2
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: fcvtzs w9, d5
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp d3, d3
|
|
; CHECK-NEXT: mov v0.s[2], w9
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i32> @llvm.fptosi.sat.v4f64.v4i32(<4 x double> %f)
|
|
ret <4 x i32> %x
|
|
}
|
|
|
|
define <5 x i32> @test_signed_v5f64_v5i32(<5 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v5f64_v5i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d5, x8
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: fmaxnm d0, d0, d5
|
|
; CHECK-NEXT: fmov d6, x9
|
|
; CHECK-NEXT: fmaxnm d7, d1, d5
|
|
; CHECK-NEXT: fminnm d0, d0, d6
|
|
; CHECK-NEXT: fmaxnm d16, d2, d5
|
|
; CHECK-NEXT: fminnm d7, d7, d6
|
|
; CHECK-NEXT: fcvtzs w8, d0
|
|
; CHECK-NEXT: fmaxnm d17, d3, d5
|
|
; CHECK-NEXT: fminnm d16, d16, d6
|
|
; CHECK-NEXT: fcvtzs w9, d7
|
|
; CHECK-NEXT: csel w0, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d5, d4, d5
|
|
; CHECK-NEXT: fminnm d17, d17, d6
|
|
; CHECK-NEXT: fcvtzs w10, d16
|
|
; CHECK-NEXT: csel w1, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp d2, d2
|
|
; CHECK-NEXT: fminnm d5, d5, d6
|
|
; CHECK-NEXT: fcvtzs w11, d17
|
|
; CHECK-NEXT: csel w2, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp d3, d3
|
|
; CHECK-NEXT: fcvtzs w12, d5
|
|
; CHECK-NEXT: csel w3, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp d4, d4
|
|
; CHECK-NEXT: csel w4, wzr, w12, vs
|
|
; CHECK-NEXT: ret
|
|
%x = call <5 x i32> @llvm.fptosi.sat.v5f64.v5i32(<5 x double> %f)
|
|
ret <5 x i32> %x
|
|
}
|
|
|
|
define <6 x i32> @test_signed_v6f64_v6i32(<6 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v6f64_v6i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d6, x8
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: fmaxnm d0, d0, d6
|
|
; CHECK-NEXT: fmov d7, x9
|
|
; CHECK-NEXT: fmaxnm d16, d1, d6
|
|
; CHECK-NEXT: fminnm d0, d0, d7
|
|
; CHECK-NEXT: fmaxnm d17, d2, d6
|
|
; CHECK-NEXT: fminnm d16, d16, d7
|
|
; CHECK-NEXT: fcvtzs w8, d0
|
|
; CHECK-NEXT: fmaxnm d18, d3, d6
|
|
; CHECK-NEXT: fminnm d17, d17, d7
|
|
; CHECK-NEXT: fcvtzs w9, d16
|
|
; CHECK-NEXT: csel w0, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d19, d4, d6
|
|
; CHECK-NEXT: fminnm d18, d18, d7
|
|
; CHECK-NEXT: fcvtzs w10, d17
|
|
; CHECK-NEXT: csel w1, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp d2, d2
|
|
; CHECK-NEXT: fmaxnm d6, d5, d6
|
|
; CHECK-NEXT: fminnm d19, d19, d7
|
|
; CHECK-NEXT: fcvtzs w11, d18
|
|
; CHECK-NEXT: csel w2, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp d3, d3
|
|
; CHECK-NEXT: fminnm d6, d6, d7
|
|
; CHECK-NEXT: fcvtzs w12, d19
|
|
; CHECK-NEXT: csel w3, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp d4, d4
|
|
; CHECK-NEXT: fcvtzs w13, d6
|
|
; CHECK-NEXT: csel w4, wzr, w12, vs
|
|
; CHECK-NEXT: fcmp d5, d5
|
|
; CHECK-NEXT: csel w5, wzr, w13, vs
|
|
; CHECK-NEXT: ret
|
|
%x = call <6 x i32> @llvm.fptosi.sat.v6f64.v6i32(<6 x double> %f)
|
|
ret <6 x i32> %x
|
|
}
|
|
|
|
;
|
|
; FP128 to signed 32-bit -- Vector size variation
|
|
;
|
|
|
|
declare <1 x i32> @llvm.fptosi.sat.v1f128.v1i32 (<1 x fp128>)
|
|
declare <2 x i32> @llvm.fptosi.sat.v2f128.v2i32 (<2 x fp128>)
|
|
declare <3 x i32> @llvm.fptosi.sat.v3f128.v3i32 (<3 x fp128>)
|
|
declare <4 x i32> @llvm.fptosi.sat.v4f128.v4i32 (<4 x fp128>)
|
|
|
|
define <1 x i32> @test_signed_v1f128_v1i32(<1 x fp128> %f) {
|
|
; CHECK-LABEL: test_signed_v1f128_v1i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #32 // =32
|
|
; CHECK-NEXT: stp x30, x19, [sp, #16] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 32
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w30, -16
|
|
; CHECK-NEXT: adrp x8, .LCPI14_0
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_0]
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: mov w8, #-2147483648
|
|
; CHECK-NEXT: csel w19, w8, w0, lt
|
|
; CHECK-NEXT: adrp x8, .LCPI14_1
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI14_1]
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: mov w8, #2147483647
|
|
; CHECK-NEXT: csel w19, w8, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: ldp x30, x19, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: add sp, sp, #32 // =32
|
|
; CHECK-NEXT: ret
|
|
%x = call <1 x i32> @llvm.fptosi.sat.v1f128.v1i32(<1 x fp128> %f)
|
|
ret <1 x i32> %x
|
|
}
|
|
|
|
define <2 x i32> @test_signed_v2f128_v2i32(<2 x fp128> %f) {
|
|
; CHECK-LABEL: test_signed_v2f128_v2i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #112 // =112
|
|
; CHECK-NEXT: str x30, [sp, #64] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 112
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -48
|
|
; CHECK-NEXT: adrp x8, .LCPI15_0
|
|
; CHECK-NEXT: mov v2.16b, v1.16b
|
|
; CHECK-NEXT: stp q1, q0, [sp, #32] // 32-byte Folded Spill
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI15_0]
|
|
; CHECK-NEXT: mov v0.16b, v2.16b
|
|
; CHECK-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: adrp x8, .LCPI15_1
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI15_1]
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: mov w20, #-2147483648
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: mov w21, #2147483647
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w22, wzr, w19, ne
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: mov v0.s[1], w22
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #64] // 8-byte Folded Reload
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: add sp, sp, #112 // =112
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i32> @llvm.fptosi.sat.v2f128.v2i32(<2 x fp128> %f)
|
|
ret <2 x i32> %x
|
|
}
|
|
|
|
define <3 x i32> @test_signed_v3f128_v3i32(<3 x fp128> %f) {
|
|
; CHECK-LABEL: test_signed_v3f128_v3i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #128 // =128
|
|
; CHECK-NEXT: str x30, [sp, #80] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #96] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #112] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 128
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -48
|
|
; CHECK-NEXT: adrp x8, .LCPI16_0
|
|
; CHECK-NEXT: stp q0, q2, [sp, #48] // 32-byte Folded Spill
|
|
; CHECK-NEXT: mov v2.16b, v1.16b
|
|
; CHECK-NEXT: str q1, [sp, #32] // 16-byte Folded Spill
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI16_0]
|
|
; CHECK-NEXT: mov v0.16b, v2.16b
|
|
; CHECK-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: adrp x8, .LCPI16_1
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI16_1]
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: mov w20, #-2147483648
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: mov w21, #2147483647
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w22, wzr, w19, ne
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: mov v0.s[1], w22
|
|
; CHECK-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #112] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #96] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
|
|
; CHECK-NEXT: mov v0.s[2], w8
|
|
; CHECK-NEXT: add sp, sp, #128 // =128
|
|
; CHECK-NEXT: ret
|
|
%x = call <3 x i32> @llvm.fptosi.sat.v3f128.v3i32(<3 x fp128> %f)
|
|
ret <3 x i32> %x
|
|
}
|
|
|
|
define <4 x i32> @test_signed_v4f128_v4i32(<4 x fp128> %f) {
|
|
; CHECK-LABEL: test_signed_v4f128_v4i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #144 // =144
|
|
; CHECK-NEXT: str x30, [sp, #96] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #112] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #128] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 144
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -48
|
|
; CHECK-NEXT: adrp x8, .LCPI17_0
|
|
; CHECK-NEXT: stp q2, q3, [sp, #64] // 32-byte Folded Spill
|
|
; CHECK-NEXT: mov v2.16b, v1.16b
|
|
; CHECK-NEXT: str q1, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_0]
|
|
; CHECK-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v2.16b
|
|
; CHECK-NEXT: str q1, [sp, #32] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: adrp x8, .LCPI17_1
|
|
; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_1]
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: mov w20, #-2147483648
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: str q1, [sp, #16] // 16-byte Folded Spill
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: mov w21, #2147483647
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w22, wzr, w19, ne
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: mov v0.s[1], w22
|
|
; CHECK-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #32] // 16-byte Folded Reload
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: ldp q1, q0, [sp, #32] // 32-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: mov v0.s[2], w8
|
|
; CHECK-NEXT: str q0, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: bl __getf2
|
|
; CHECK-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w19, w0
|
|
; CHECK-NEXT: bl __fixtfsi
|
|
; CHECK-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr q1, [sp, #16] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w19, #0 // =0
|
|
; CHECK-NEXT: csel w19, w20, w0, lt
|
|
; CHECK-NEXT: bl __gttf2
|
|
; CHECK-NEXT: ldr q0, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: csel w19, w21, w19, gt
|
|
; CHECK-NEXT: mov v1.16b, v0.16b
|
|
; CHECK-NEXT: bl __unordtf2
|
|
; CHECK-NEXT: cmp w0, #0 // =0
|
|
; CHECK-NEXT: ldr q0, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel w8, wzr, w19, ne
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #128] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #112] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #96] // 8-byte Folded Reload
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: add sp, sp, #144 // =144
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i32> @llvm.fptosi.sat.v4f128.v4i32(<4 x fp128> %f)
|
|
ret <4 x i32> %x
|
|
}
|
|
|
|
;
|
|
; FP16 to signed 32-bit -- Vector size variation
|
|
;
|
|
|
|
declare <1 x i32> @llvm.fptosi.sat.v1f16.v1i32 (<1 x half>)
|
|
declare <2 x i32> @llvm.fptosi.sat.v2f16.v2i32 (<2 x half>)
|
|
declare <3 x i32> @llvm.fptosi.sat.v3f16.v3i32 (<3 x half>)
|
|
declare <4 x i32> @llvm.fptosi.sat.v4f16.v4i32 (<4 x half>)
|
|
declare <5 x i32> @llvm.fptosi.sat.v5f16.v5i32 (<5 x half>)
|
|
declare <6 x i32> @llvm.fptosi.sat.v6f16.v6i32 (<6 x half>)
|
|
declare <7 x i32> @llvm.fptosi.sat.v7f16.v7i32 (<7 x half>)
|
|
declare <8 x i32> @llvm.fptosi.sat.v8f16.v8i32 (<8 x half>)
|
|
|
|
define <1 x i32> @test_signed_v1f16_v1i32(<1 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v1f16_v1i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: fmov s1, w8
|
|
; CHECK-NEXT: mov w8, #1325400063
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fcmp s0, s1
|
|
; CHECK-NEXT: fmov s1, w8
|
|
; CHECK-NEXT: fcvtzs w8, s0
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: mov w9, #2147483647
|
|
; CHECK-NEXT: fcmp s0, s1
|
|
; CHECK-NEXT: csel w8, w9, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <1 x i32> @llvm.fptosi.sat.v1f16.v1i32(<1 x half> %f)
|
|
ret <1 x i32> %x
|
|
}
|
|
|
|
define <2 x i32> @test_signed_v2f16_v2i32(<2 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v2f16_v2i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w8, s0
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: mov v0.s[1], w10
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i32> @llvm.fptosi.sat.v2f16.v2i32(<2 x half> %f)
|
|
ret <2 x i32> %x
|
|
}
|
|
|
|
define <3 x i32> @test_signed_v3f16_v3i32(<3 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v3f16_v3i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s4, w10
|
|
; CHECK-NEXT: fcvtzs w8, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w10, s2
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: mov h1, v0.h[2]
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s0, w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov v0.s[2], w10
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <3 x i32> @llvm.fptosi.sat.v3f16.v3i32(<3 x half> %f)
|
|
ret <3 x i32> %x
|
|
}
|
|
|
|
define <4 x i32> @test_signed_v4f16_v4i32(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s4, w10
|
|
; CHECK-NEXT: fcvtzs w8, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w10, s2
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: mov h1, v0.h[2]
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s0, w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov v0.s[2], w10
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f)
|
|
ret <4 x i32> %x
|
|
}
|
|
|
|
define <5 x i32> @test_signed_v5f16_v5i32(<5 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v5f16_v5i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: fcvt s1, h0
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fcvtzs w12, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w8, w9, w12, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w0, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: csel w8, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov h1, v0.h[2]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w1, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: csel w8, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov h1, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w2, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8
|
|
; CHECK-NEXT: csel w8, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w12, s0
|
|
; CHECK-NEXT: csel w3, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel w8, w9, w12, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w4, wzr, w8, vs
|
|
; CHECK-NEXT: ret
|
|
%x = call <5 x i32> @llvm.fptosi.sat.v5f16.v5i32(<5 x half> %f)
|
|
ret <5 x i32> %x
|
|
}
|
|
|
|
define <6 x i32> @test_signed_v6f16_v6i32(<6 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v6f16_v6i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: mov h2, v1.h[1]
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: fcvt s2, h2
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s4, w10
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w5, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w8, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w10, s2
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs w12, s1
|
|
; CHECK-NEXT: csel w0, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov h2, v0.h[2]
|
|
; CHECK-NEXT: csel w10, w9, w12, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h2
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w13, s2
|
|
; CHECK-NEXT: csel w1, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: csel w10, w9, w13, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fmov s1, w8
|
|
; CHECK-NEXT: fcvtzs w8, s0
|
|
; CHECK-NEXT: csel w2, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s0, s4
|
|
; CHECK-NEXT: mov v1.s[1], w5
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w3, wzr, w8, vs
|
|
; CHECK-NEXT: fmov w4, s1
|
|
; CHECK-NEXT: ret
|
|
%x = call <6 x i32> @llvm.fptosi.sat.v6f16.v6i32(<6 x half> %f)
|
|
ret <6 x i32> %x
|
|
}
|
|
|
|
define <7 x i32> @test_signed_v7f16_v7i32(<7 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v7f16_v7i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: ext v3.16b, v0.16b, v0.16b, #8
|
|
; CHECK-NEXT: mov w10, #-822083584
|
|
; CHECK-NEXT: mov h4, v3.h[1]
|
|
; CHECK-NEXT: mov w11, #1325400063
|
|
; CHECK-NEXT: fmov s2, w10
|
|
; CHECK-NEXT: fcvt s4, h4
|
|
; CHECK-NEXT: mov w8, #-2147483648
|
|
; CHECK-NEXT: fmov s1, w11
|
|
; CHECK-NEXT: fcvtzs w10, s4
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: mov w9, #2147483647
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s4, s1
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fcvt s4, h3
|
|
; CHECK-NEXT: fcvtzs w11, s4
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s4, s1
|
|
; CHECK-NEXT: mov h3, v3.h[2]
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fcvt s3, h3
|
|
; CHECK-NEXT: fcvtzs w12, s3
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s3, s2
|
|
; CHECK-NEXT: csel w12, w8, w12, lt
|
|
; CHECK-NEXT: fcmp s3, s1
|
|
; CHECK-NEXT: fcvt s4, h0
|
|
; CHECK-NEXT: csel w12, w9, w12, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: fcvtzs w13, s4
|
|
; CHECK-NEXT: csel w6, wzr, w12, vs
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: mov h3, v0.h[1]
|
|
; CHECK-NEXT: csel w12, w8, w13, lt
|
|
; CHECK-NEXT: fcmp s4, s1
|
|
; CHECK-NEXT: csel w12, w9, w12, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fcvt s3, h3
|
|
; CHECK-NEXT: fcvtzs w13, s3
|
|
; CHECK-NEXT: csel w0, wzr, w12, vs
|
|
; CHECK-NEXT: fcmp s3, s2
|
|
; CHECK-NEXT: mov h4, v0.h[2]
|
|
; CHECK-NEXT: csel w12, w8, w13, lt
|
|
; CHECK-NEXT: fcmp s3, s1
|
|
; CHECK-NEXT: fcvt s4, h4
|
|
; CHECK-NEXT: csel w12, w9, w12, gt
|
|
; CHECK-NEXT: fcmp s3, s3
|
|
; CHECK-NEXT: fmov s3, w11
|
|
; CHECK-NEXT: fcvtzs w11, s4
|
|
; CHECK-NEXT: csel w1, wzr, w12, vs
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s4, s1
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: mov v3.s[1], w10
|
|
; CHECK-NEXT: fcvtzs w10, s0
|
|
; CHECK-NEXT: csel w2, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel w8, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s0, s1
|
|
; CHECK-NEXT: mov v3.s[2], w6
|
|
; CHECK-NEXT: csel w8, w9, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w3, wzr, w8, vs
|
|
; CHECK-NEXT: mov w5, v3.s[1]
|
|
; CHECK-NEXT: fmov w4, s3
|
|
; CHECK-NEXT: ret
|
|
%x = call <7 x i32> @llvm.fptosi.sat.v7f16.v7i32(<7 x half> %f)
|
|
ret <7 x i32> %x
|
|
}
|
|
|
|
define <8 x i32> @test_signed_v8f16_v8i32(<8 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v8f16_v8i32:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w10, #-822083584
|
|
; CHECK-NEXT: mov w11, #1325400063
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: mov w8, #-2147483648
|
|
; CHECK-NEXT: fmov s2, w11
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov w9, #2147483647
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: fcvt s4, h0
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w11, s4
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s4, s3
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: mov h1, v0.h[3]
|
|
; CHECK-NEXT: ext v6.16b, v0.16b, v0.16b, #8
|
|
; CHECK-NEXT: fmov s0, w11
|
|
; CHECK-NEXT: fcvtzs w11, s5
|
|
; CHECK-NEXT: fcmp s5, s3
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s5, s2
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.s[1], w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov h4, v6.h[1]
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvt s4, h4
|
|
; CHECK-NEXT: mov v0.s[2], w11
|
|
; CHECK-NEXT: fcvtzs w11, s4
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s4, s3
|
|
; CHECK-NEXT: csel w11, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: fcvt s1, h6
|
|
; CHECK-NEXT: csel w11, w9, w11, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: mov v0.s[3], w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: csel w11, wzr, w11, vs
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov h4, v6.h[2]
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvt s4, h4
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fmov s1, w10
|
|
; CHECK-NEXT: fcvtzs w10, s4
|
|
; CHECK-NEXT: fcmp s4, s3
|
|
; CHECK-NEXT: mov h5, v6.h[3]
|
|
; CHECK-NEXT: csel w10, w8, w10, lt
|
|
; CHECK-NEXT: fcmp s4, s2
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: csel w10, w9, w10, gt
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: mov v1.s[1], w11
|
|
; CHECK-NEXT: fcvtzs w11, s5
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s5, s3
|
|
; CHECK-NEXT: csel w8, w8, w11, lt
|
|
; CHECK-NEXT: fcmp s5, s2
|
|
; CHECK-NEXT: csel w8, w9, w8, gt
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v1.s[2], w10
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v1.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <8 x i32> @llvm.fptosi.sat.v8f16.v8i32(<8 x half> %f)
|
|
ret <8 x i32> %x
|
|
}
|
|
|
|
;
|
|
; 2-Vector float to signed integer -- result size variation
|
|
;
|
|
|
|
declare <2 x i1> @llvm.fptosi.sat.v2f32.v2i1 (<2 x float>)
|
|
declare <2 x i8> @llvm.fptosi.sat.v2f32.v2i8 (<2 x float>)
|
|
declare <2 x i13> @llvm.fptosi.sat.v2f32.v2i13 (<2 x float>)
|
|
declare <2 x i16> @llvm.fptosi.sat.v2f32.v2i16 (<2 x float>)
|
|
declare <2 x i19> @llvm.fptosi.sat.v2f32.v2i19 (<2 x float>)
|
|
declare <2 x i50> @llvm.fptosi.sat.v2f32.v2i50 (<2 x float>)
|
|
declare <2 x i64> @llvm.fptosi.sat.v2f32.v2i64 (<2 x float>)
|
|
declare <2 x i100> @llvm.fptosi.sat.v2f32.v2i100(<2 x float>)
|
|
declare <2 x i128> @llvm.fptosi.sat.v2f32.v2i128(<2 x float>)
|
|
|
|
define <2 x i1> @test_signed_v2f32_v2i1(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: fmov s2, #-1.00000000
|
|
; CHECK-NEXT: fmov s3, wzr
|
|
; CHECK-NEXT: fmaxnm s4, s1, s2
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmaxnm s1, s0, s2
|
|
; CHECK-NEXT: fminnm s2, s4, s3
|
|
; CHECK-NEXT: fminnm s1, s1, s3
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i1> @llvm.fptosi.sat.v2f32.v2i1(<2 x float> %f)
|
|
ret <2 x i1> %x
|
|
}
|
|
|
|
define <2 x i8> @test_signed_v2f32_v2i8(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i8:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-1023410176
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: mov w9, #1123942400
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: fmaxnm s3, s1, s2
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmaxnm s1, s0, s2
|
|
; CHECK-NEXT: fminnm s2, s3, s4
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i8> @llvm.fptosi.sat.v2f32.v2i8(<2 x float> %f)
|
|
ret <2 x i8> %x
|
|
}
|
|
|
|
define <2 x i13> @test_signed_v2f32_v2i13(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i13:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-981467136
|
|
; CHECK-NEXT: mov w9, #61440
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: movk w9, #17791, lsl #16
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: fmaxnm s3, s1, s2
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmaxnm s1, s0, s2
|
|
; CHECK-NEXT: fminnm s2, s3, s4
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i13> @llvm.fptosi.sat.v2f32.v2i13(<2 x float> %f)
|
|
ret <2 x i13> %x
|
|
}
|
|
|
|
define <2 x i16> @test_signed_v2f32_v2i16(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-956301312
|
|
; CHECK-NEXT: mov w9, #65024
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: movk w9, #18175, lsl #16
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: fmaxnm s3, s1, s2
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmaxnm s1, s0, s2
|
|
; CHECK-NEXT: fminnm s2, s3, s4
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i16> @llvm.fptosi.sat.v2f32.v2i16(<2 x float> %f)
|
|
ret <2 x i16> %x
|
|
}
|
|
|
|
define <2 x i19> @test_signed_v2f32_v2i19(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i19:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-931135488
|
|
; CHECK-NEXT: mov w9, #65472
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: movk w9, #18559, lsl #16
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: fmaxnm s3, s1, s2
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmaxnm s1, s0, s2
|
|
; CHECK-NEXT: fminnm s2, s3, s4
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i19> @llvm.fptosi.sat.v2f32.v2i19(<2 x float> %f)
|
|
ret <2 x i19> %x
|
|
}
|
|
|
|
define <2 x i32> @test_signed_v2f32_v2i32_duplicate(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i32_duplicate:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w8, s0
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: mov v0.s[1], w10
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i32> @llvm.fptosi.sat.v2f32.v2i32(<2 x float> %f)
|
|
ret <2 x i32> %x
|
|
}
|
|
|
|
define <2 x i50> @test_signed_v2f32_v2i50(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i50:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-671088640
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: mov w10, #1476395007
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov x9, #-562949953421312
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: fcvtzs x10, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov x11, #562949953421311
|
|
; CHECK-NEXT: csel x10, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel x10, x11, x10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs x8, s0
|
|
; CHECK-NEXT: csel x10, xzr, x10, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel x8, x9, x8, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel x8, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x8
|
|
; CHECK-NEXT: mov v0.d[1], x10
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i50> @llvm.fptosi.sat.v2f32.v2i50(<2 x float> %f)
|
|
ret <2 x i50> %x
|
|
}
|
|
|
|
define <2 x i64> @test_signed_v2f32_v2i64(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-553648128
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s1, v0.s[1]
|
|
; CHECK-NEXT: mov w10, #1593835519
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov x9, #-9223372036854775808
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: fcvtzs x10, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov x11, #9223372036854775807
|
|
; CHECK-NEXT: csel x10, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel x10, x11, x10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs x8, s0
|
|
; CHECK-NEXT: csel x10, xzr, x10, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel x8, x9, x8, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel x8, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x8
|
|
; CHECK-NEXT: mov v0.d[1], x10
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i64> @llvm.fptosi.sat.v2f32.v2i64(<2 x float> %f)
|
|
ret <2 x i64> %x
|
|
}
|
|
|
|
define <2 x i100> @test_signed_v2f32_v2i100(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i100:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #80 // =80
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 80
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -40
|
|
; CHECK-NEXT: .cfi_offset b8, -48
|
|
; CHECK-NEXT: .cfi_offset b9, -56
|
|
; CHECK-NEXT: .cfi_offset b10, -64
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s8, v0.s[1]
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: mov w8, #-251658240
|
|
; CHECK-NEXT: mov w9, #1895825407
|
|
; CHECK-NEXT: fmov s9, w8
|
|
; CHECK-NEXT: mov x21, #-34359738368
|
|
; CHECK-NEXT: fmov s10, w9
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: mov x22, #34359738367
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x21, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x22, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s0, s9
|
|
; CHECK-NEXT: csel x8, x21, x1, lt
|
|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp s0, s10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x22, x8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #80 // =80
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i100> @llvm.fptosi.sat.v2f32.v2i100(<2 x float> %f)
|
|
ret <2 x i100> %x
|
|
}
|
|
|
|
define <2 x i128> @test_signed_v2f32_v2i128(<2 x float> %f) {
|
|
; CHECK-LABEL: test_signed_v2f32_v2i128:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #80 // =80
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 80
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -40
|
|
; CHECK-NEXT: .cfi_offset b8, -48
|
|
; CHECK-NEXT: .cfi_offset b9, -56
|
|
; CHECK-NEXT: .cfi_offset b10, -64
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov s8, v0.s[1]
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: mov w8, #-16777216
|
|
; CHECK-NEXT: mov w9, #2130706431
|
|
; CHECK-NEXT: fmov s9, w8
|
|
; CHECK-NEXT: mov x21, #-9223372036854775808
|
|
; CHECK-NEXT: fmov s10, w9
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: mov x22, #9223372036854775807
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x21, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x22, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: // kill: def $s0 killed $s0 killed $q0
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s0, s9
|
|
; CHECK-NEXT: csel x8, x21, x1, lt
|
|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp s0, s10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x22, x8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #80 // =80
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i128> @llvm.fptosi.sat.v2f32.v2i128(<2 x float> %f)
|
|
ret <2 x i128> %x
|
|
}
|
|
|
|
;
|
|
; 2-Vector double to signed integer -- result size variation
|
|
;
|
|
|
|
declare <2 x i1> @llvm.fptosi.sat.v2f64.v2i1 (<2 x double>)
|
|
declare <2 x i8> @llvm.fptosi.sat.v2f64.v2i8 (<2 x double>)
|
|
declare <2 x i13> @llvm.fptosi.sat.v2f64.v2i13 (<2 x double>)
|
|
declare <2 x i16> @llvm.fptosi.sat.v2f64.v2i16 (<2 x double>)
|
|
declare <2 x i19> @llvm.fptosi.sat.v2f64.v2i19 (<2 x double>)
|
|
declare <2 x i50> @llvm.fptosi.sat.v2f64.v2i50 (<2 x double>)
|
|
declare <2 x i64> @llvm.fptosi.sat.v2f64.v2i64 (<2 x double>)
|
|
declare <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double>)
|
|
declare <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double>)
|
|
|
|
define <2 x i1> @test_signed_v2f64_v2i1(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: fmov d2, #-1.00000000
|
|
; CHECK-NEXT: fmov d3, xzr
|
|
; CHECK-NEXT: fmaxnm d4, d1, d2
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d4, d3
|
|
; CHECK-NEXT: fminnm d1, d1, d3
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i1> @llvm.fptosi.sat.v2f64.v2i1(<2 x double> %f)
|
|
ret <2 x i1> %x
|
|
}
|
|
|
|
define <2 x i8> @test_signed_v2f64_v2i8(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i8:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4584664420663164928
|
|
; CHECK-NEXT: mov x9, #211106232532992
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16479, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i8> @llvm.fptosi.sat.v2f64.v2i8(<2 x double> %f)
|
|
ret <2 x i8> %x
|
|
}
|
|
|
|
define <2 x i13> @test_signed_v2f64_v2i13(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i13:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4562146422526312448
|
|
; CHECK-NEXT: mov x9, #279275953455104
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16559, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i13> @llvm.fptosi.sat.v2f64.v2i13(<2 x double> %f)
|
|
ret <2 x i13> %x
|
|
}
|
|
|
|
define <2 x i16> @test_signed_v2f64_v2i16(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4548635623644200960
|
|
; CHECK-NEXT: mov x9, #281200098803712
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16607, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i16> @llvm.fptosi.sat.v2f64.v2i16(<2 x double> %f)
|
|
ret <2 x i16> %x
|
|
}
|
|
|
|
define <2 x i19> @test_signed_v2f64_v2i19(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i19:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4535124824762089472
|
|
; CHECK-NEXT: mov x9, #281440616972288
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16655, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i19> @llvm.fptosi.sat.v2f64.v2i19(<2 x double> %f)
|
|
ret <2 x i19> %x
|
|
}
|
|
|
|
define <2 x i32> @test_signed_v2f64_v2i32_duplicate(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i32_duplicate:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4476578029606273024
|
|
; CHECK-NEXT: mov x9, #281474972516352
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #16863, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs w8, d2
|
|
; CHECK-NEXT: fcvtzs w9, d1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fmov s0, w9
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i32> @llvm.fptosi.sat.v2f64.v2i32(<2 x double> %f)
|
|
ret <2 x i32> %x
|
|
}
|
|
|
|
define <2 x i50> @test_signed_v2f64_v2i50(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i50:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4395513236313604096
|
|
; CHECK-NEXT: mov x9, #-16
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: movk x9, #17151, lsl #48
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: fmaxnm d3, d1, d2
|
|
; CHECK-NEXT: fmov d4, x9
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fmaxnm d1, d0, d2
|
|
; CHECK-NEXT: fminnm d2, d3, d4
|
|
; CHECK-NEXT: fminnm d1, d1, d4
|
|
; CHECK-NEXT: fcvtzs x8, d2
|
|
; CHECK-NEXT: fcvtzs x9, d1
|
|
; CHECK-NEXT: csel x8, xzr, x8, vs
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x8
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i50> @llvm.fptosi.sat.v2f64.v2i50(<2 x double> %f)
|
|
ret <2 x i50> %x
|
|
}
|
|
|
|
define <2 x i64> @test_signed_v2f64_v2i64(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-4332462841530417152
|
|
; CHECK-NEXT: mov d1, v0.d[1]
|
|
; CHECK-NEXT: mov x10, #4890909195324358655
|
|
; CHECK-NEXT: fmov d2, x8
|
|
; CHECK-NEXT: mov x9, #-9223372036854775808
|
|
; CHECK-NEXT: fmov d3, x10
|
|
; CHECK-NEXT: fcvtzs x10, d1
|
|
; CHECK-NEXT: fcmp d1, d2
|
|
; CHECK-NEXT: mov x11, #9223372036854775807
|
|
; CHECK-NEXT: csel x10, x9, x10, lt
|
|
; CHECK-NEXT: fcmp d1, d3
|
|
; CHECK-NEXT: csel x10, x11, x10, gt
|
|
; CHECK-NEXT: fcmp d1, d1
|
|
; CHECK-NEXT: fcvtzs x8, d0
|
|
; CHECK-NEXT: csel x10, xzr, x10, vs
|
|
; CHECK-NEXT: fcmp d0, d2
|
|
; CHECK-NEXT: csel x8, x9, x8, lt
|
|
; CHECK-NEXT: fcmp d0, d3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel x8, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x8
|
|
; CHECK-NEXT: mov v0.d[1], x10
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i64> @llvm.fptosi.sat.v2f64.v2i64(<2 x double> %f)
|
|
ret <2 x i64> %x
|
|
}
|
|
|
|
define <2 x i100> @test_signed_v2f64_v2i100(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i100:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #80 // =80
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 80
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -40
|
|
; CHECK-NEXT: .cfi_offset b8, -48
|
|
; CHECK-NEXT: .cfi_offset b9, -56
|
|
; CHECK-NEXT: .cfi_offset b10, -64
|
|
; CHECK-NEXT: mov d8, v0.d[1]
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixdfti
|
|
; CHECK-NEXT: mov x8, #-4170333254945079296
|
|
; CHECK-NEXT: mov x9, #5053038781909696511
|
|
; CHECK-NEXT: fmov d9, x8
|
|
; CHECK-NEXT: mov x21, #-34359738368
|
|
; CHECK-NEXT: fmov d10, x9
|
|
; CHECK-NEXT: fcmp d8, d9
|
|
; CHECK-NEXT: mov x22, #34359738367
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x21, x1, lt
|
|
; CHECK-NEXT: fcmp d8, d10
|
|
; CHECK-NEXT: csel x9, x22, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp d8, d8
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: bl __fixdfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp d0, d9
|
|
; CHECK-NEXT: csel x8, x21, x1, lt
|
|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp d0, d10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x22, x8, gt
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #80 // =80
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i100> @llvm.fptosi.sat.v2f64.v2i100(<2 x double> %f)
|
|
ret <2 x i100> %x
|
|
}
|
|
|
|
define <2 x i128> @test_signed_v2f64_v2i128(<2 x double> %f) {
|
|
; CHECK-LABEL: test_signed_v2f64_v2i128:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #80 // =80
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 80
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w30, -40
|
|
; CHECK-NEXT: .cfi_offset b8, -48
|
|
; CHECK-NEXT: .cfi_offset b9, -56
|
|
; CHECK-NEXT: .cfi_offset b10, -64
|
|
; CHECK-NEXT: mov d8, v0.d[1]
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixdfti
|
|
; CHECK-NEXT: mov x8, #-4044232465378705408
|
|
; CHECK-NEXT: mov x9, #5179139571476070399
|
|
; CHECK-NEXT: fmov d9, x8
|
|
; CHECK-NEXT: mov x21, #-9223372036854775808
|
|
; CHECK-NEXT: fmov d10, x9
|
|
; CHECK-NEXT: fcmp d8, d9
|
|
; CHECK-NEXT: mov x22, #9223372036854775807
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x21, x1, lt
|
|
; CHECK-NEXT: fcmp d8, d10
|
|
; CHECK-NEXT: csel x9, x22, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp d8, d8
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: bl __fixdfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp d0, d9
|
|
; CHECK-NEXT: csel x8, x21, x1, lt
|
|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp d0, d10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x22, x8, gt
|
|
; CHECK-NEXT: fcmp d0, d0
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #80 // =80
|
|
; CHECK-NEXT: ret
|
|
%x = call <2 x i128> @llvm.fptosi.sat.v2f64.v2i128(<2 x double> %f)
|
|
ret <2 x i128> %x
|
|
}
|
|
|
|
;
|
|
; 4-Vector half to signed integer -- result size variation
|
|
;
|
|
|
|
declare <4 x i1> @llvm.fptosi.sat.v4f16.v4i1 (<4 x half>)
|
|
declare <4 x i8> @llvm.fptosi.sat.v4f16.v4i8 (<4 x half>)
|
|
declare <4 x i13> @llvm.fptosi.sat.v4f16.v4i13 (<4 x half>)
|
|
declare <4 x i16> @llvm.fptosi.sat.v4f16.v4i16 (<4 x half>)
|
|
declare <4 x i19> @llvm.fptosi.sat.v4f16.v4i19 (<4 x half>)
|
|
declare <4 x i50> @llvm.fptosi.sat.v4f16.v4i50 (<4 x half>)
|
|
declare <4 x i64> @llvm.fptosi.sat.v4f16.v4i64 (<4 x half>)
|
|
declare <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half>)
|
|
declare <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half>)
|
|
|
|
define <4 x i1> @test_signed_v4f16_v4i1(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: fmov s2, #-1.00000000
|
|
; CHECK-NEXT: fcvt s4, h0
|
|
; CHECK-NEXT: fmov s3, wzr
|
|
; CHECK-NEXT: fmaxnm s5, s4, s2
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fminnm s5, s5, s3
|
|
; CHECK-NEXT: fcvtzs w8, s5
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvt s6, h0
|
|
; CHECK-NEXT: fmaxnm s0, s1, s2
|
|
; CHECK-NEXT: fminnm s0, s0, s3
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w9, s0
|
|
; CHECK-NEXT: fmaxnm s0, s5, s2
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s4, s4
|
|
; CHECK-NEXT: fmaxnm s1, s6, s2
|
|
; CHECK-NEXT: fminnm s2, s0, s3
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fminnm s1, s1, s3
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.h[1], w9
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s6, s6
|
|
; CHECK-NEXT: mov v0.h[2], w8
|
|
; CHECK-NEXT: csel w8, wzr, w9, vs
|
|
; CHECK-NEXT: mov v0.h[3], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i1> @llvm.fptosi.sat.v4f16.v4i1(<4 x half> %f)
|
|
ret <4 x i1> %x
|
|
}
|
|
|
|
define <4 x i8> @test_signed_v4f16_v4i8(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i8:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-1023410176
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov w9, #1123942400
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fmaxnm s5, s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fminnm s5, s5, s4
|
|
; CHECK-NEXT: fcvtzs w8, s5
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvt s6, h0
|
|
; CHECK-NEXT: fmaxnm s0, s1, s3
|
|
; CHECK-NEXT: fminnm s0, s0, s4
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w9, s0
|
|
; CHECK-NEXT: fmaxnm s0, s5, s3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fmaxnm s1, s6, s3
|
|
; CHECK-NEXT: fminnm s3, s0, s4
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: fcvtzs w8, s3
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.h[1], w9
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s6, s6
|
|
; CHECK-NEXT: mov v0.h[2], w8
|
|
; CHECK-NEXT: csel w8, wzr, w9, vs
|
|
; CHECK-NEXT: mov v0.h[3], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i8> @llvm.fptosi.sat.v4f16.v4i8(<4 x half> %f)
|
|
ret <4 x i8> %x
|
|
}
|
|
|
|
define <4 x i13> @test_signed_v4f16_v4i13(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i13:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-981467136
|
|
; CHECK-NEXT: mov w9, #61440
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: movk w9, #17791, lsl #16
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fmaxnm s5, s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fminnm s5, s5, s4
|
|
; CHECK-NEXT: fcvtzs w8, s5
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvt s6, h0
|
|
; CHECK-NEXT: fmaxnm s0, s1, s3
|
|
; CHECK-NEXT: fminnm s0, s0, s4
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w9, s0
|
|
; CHECK-NEXT: fmaxnm s0, s5, s3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fmaxnm s1, s6, s3
|
|
; CHECK-NEXT: fminnm s3, s0, s4
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: fcvtzs w8, s3
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.h[1], w9
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s6, s6
|
|
; CHECK-NEXT: mov v0.h[2], w8
|
|
; CHECK-NEXT: csel w8, wzr, w9, vs
|
|
; CHECK-NEXT: mov v0.h[3], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i13> @llvm.fptosi.sat.v4f16.v4i13(<4 x half> %f)
|
|
ret <4 x i13> %x
|
|
}
|
|
|
|
define <4 x i16> @test_signed_v4f16_v4i16(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i16:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-956301312
|
|
; CHECK-NEXT: mov w9, #65024
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: movk w9, #18175, lsl #16
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fmaxnm s5, s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fminnm s5, s5, s4
|
|
; CHECK-NEXT: fcvtzs w8, s5
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvt s6, h0
|
|
; CHECK-NEXT: fmaxnm s0, s1, s3
|
|
; CHECK-NEXT: fminnm s0, s0, s4
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w9, s0
|
|
; CHECK-NEXT: fmaxnm s0, s5, s3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fmaxnm s1, s6, s3
|
|
; CHECK-NEXT: fminnm s3, s0, s4
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: fcvtzs w8, s3
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.h[1], w9
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s6, s6
|
|
; CHECK-NEXT: mov v0.h[2], w8
|
|
; CHECK-NEXT: csel w8, wzr, w9, vs
|
|
; CHECK-NEXT: mov v0.h[3], w8
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i16> @llvm.fptosi.sat.v4f16.v4i16(<4 x half> %f)
|
|
ret <4 x i16> %x
|
|
}
|
|
|
|
define <4 x i19> @test_signed_v4f16_v4i19(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i19:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-931135488
|
|
; CHECK-NEXT: mov w9, #65472
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: movk w9, #18559, lsl #16
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: fmov s4, w9
|
|
; CHECK-NEXT: fmaxnm s5, s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fminnm s5, s5, s4
|
|
; CHECK-NEXT: fcvtzs w8, s5
|
|
; CHECK-NEXT: mov h5, v0.h[2]
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvt s6, h0
|
|
; CHECK-NEXT: fmaxnm s0, s1, s3
|
|
; CHECK-NEXT: fminnm s0, s0, s4
|
|
; CHECK-NEXT: fcvt s5, h5
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w9, s0
|
|
; CHECK-NEXT: fmaxnm s0, s5, s3
|
|
; CHECK-NEXT: csel w9, wzr, w9, vs
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: fmaxnm s1, s6, s3
|
|
; CHECK-NEXT: fminnm s3, s0, s4
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fminnm s1, s1, s4
|
|
; CHECK-NEXT: fmov s0, w8
|
|
; CHECK-NEXT: fcvtzs w8, s3
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: mov v0.s[1], w9
|
|
; CHECK-NEXT: fcvtzs w9, s1
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s6, s6
|
|
; CHECK-NEXT: mov v0.s[2], w8
|
|
; CHECK-NEXT: csel w8, wzr, w9, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i19> @llvm.fptosi.sat.v4f16.v4i19(<4 x half> %f)
|
|
ret <4 x i19> %x
|
|
}
|
|
|
|
define <4 x i32> @test_signed_v4f16_v4i32_duplicate(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i32_duplicate:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w8, #-822083584
|
|
; CHECK-NEXT: mov w10, #1325400063
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: mov w9, #-2147483648
|
|
; CHECK-NEXT: fmov s4, w10
|
|
; CHECK-NEXT: fcvtzs w8, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov w11, #2147483647
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs w10, s2
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: mov h1, v0.h[2]
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: fmov s0, w10
|
|
; CHECK-NEXT: fcvtzs w10, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel w10, w9, w10, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: csel w10, w11, w10, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov v0.s[1], w8
|
|
; CHECK-NEXT: fcvtzs w8, s2
|
|
; CHECK-NEXT: csel w10, wzr, w10, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: csel w8, w9, w8, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: csel w8, w11, w8, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: mov v0.s[2], w10
|
|
; CHECK-NEXT: csel w8, wzr, w8, vs
|
|
; CHECK-NEXT: mov v0.s[3], w8
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i32> @llvm.fptosi.sat.v4f16.v4i32(<4 x half> %f)
|
|
ret <4 x i32> %x
|
|
}
|
|
|
|
define <4 x i50> @test_signed_v4f16_v4i50(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i50:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-671088640
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: fcvt s1, h0
|
|
; CHECK-NEXT: mov w10, #1476395007
|
|
; CHECK-NEXT: fmov s2, w8
|
|
; CHECK-NEXT: mov x9, #-562949953421312
|
|
; CHECK-NEXT: fcvtzs x12, s1
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: fmov s3, w10
|
|
; CHECK-NEXT: mov x11, #562949953421311
|
|
; CHECK-NEXT: csel x8, x9, x12, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs x10, s1
|
|
; CHECK-NEXT: csel x0, xzr, x8, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: csel x8, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: mov h1, v0.h[2]
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fcvtzs x10, s1
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fcmp s1, s2
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: csel x8, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: fcvt s0, h0
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs x12, s0
|
|
; CHECK-NEXT: csel x2, xzr, x8, vs
|
|
; CHECK-NEXT: fcmp s0, s2
|
|
; CHECK-NEXT: csel x8, x9, x12, lt
|
|
; CHECK-NEXT: fcmp s0, s3
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s0, s0
|
|
; CHECK-NEXT: csel x3, xzr, x8, vs
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i50> @llvm.fptosi.sat.v4f16.v4i50(<4 x half> %f)
|
|
ret <4 x i50> %x
|
|
}
|
|
|
|
define <4 x i64> @test_signed_v4f16_v4i64(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i64:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: mov w8, #-553648128
|
|
; CHECK-NEXT: mov w10, #1593835519
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: fmov s3, w8
|
|
; CHECK-NEXT: mov x9, #-9223372036854775808
|
|
; CHECK-NEXT: fmov s4, w10
|
|
; CHECK-NEXT: fcvtzs x8, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov x11, #9223372036854775807
|
|
; CHECK-NEXT: csel x8, x9, x8, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s2, h0
|
|
; CHECK-NEXT: csel x8, x11, x8, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fcvtzs x10, s2
|
|
; CHECK-NEXT: csel x8, xzr, x8, vs
|
|
; CHECK-NEXT: fcmp s2, s3
|
|
; CHECK-NEXT: mov h1, v0.h[3]
|
|
; CHECK-NEXT: csel x10, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s2, s4
|
|
; CHECK-NEXT: fcvt s1, h1
|
|
; CHECK-NEXT: csel x10, x11, x10, gt
|
|
; CHECK-NEXT: fcmp s2, s2
|
|
; CHECK-NEXT: csel x10, xzr, x10, vs
|
|
; CHECK-NEXT: fcvtzs x12, s1
|
|
; CHECK-NEXT: fcmp s1, s3
|
|
; CHECK-NEXT: mov h0, v0.h[2]
|
|
; CHECK-NEXT: csel x12, x9, x12, lt
|
|
; CHECK-NEXT: fcmp s1, s4
|
|
; CHECK-NEXT: fcvt s5, h0
|
|
; CHECK-NEXT: csel x12, x11, x12, gt
|
|
; CHECK-NEXT: fcmp s1, s1
|
|
; CHECK-NEXT: fmov d0, x10
|
|
; CHECK-NEXT: fcvtzs x10, s5
|
|
; CHECK-NEXT: csel x12, xzr, x12, vs
|
|
; CHECK-NEXT: fcmp s5, s3
|
|
; CHECK-NEXT: csel x9, x9, x10, lt
|
|
; CHECK-NEXT: fcmp s5, s4
|
|
; CHECK-NEXT: csel x9, x11, x9, gt
|
|
; CHECK-NEXT: fcmp s5, s5
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: fmov d1, x9
|
|
; CHECK-NEXT: mov v0.d[1], x8
|
|
; CHECK-NEXT: mov v1.d[1], x12
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i64> @llvm.fptosi.sat.v4f16.v4i64(<4 x half> %f)
|
|
ret <4 x i64> %x
|
|
}
|
|
|
|
define <4 x i100> @test_signed_v4f16_v4i100(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i100:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #112 // =112
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 112
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w23, -40
|
|
; CHECK-NEXT: .cfi_offset w24, -48
|
|
; CHECK-NEXT: .cfi_offset w25, -56
|
|
; CHECK-NEXT: .cfi_offset w26, -64
|
|
; CHECK-NEXT: .cfi_offset w30, -72
|
|
; CHECK-NEXT: .cfi_offset b8, -80
|
|
; CHECK-NEXT: .cfi_offset b9, -88
|
|
; CHECK-NEXT: .cfi_offset b10, -96
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fcvt s8, h1
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w8, #-251658240
|
|
; CHECK-NEXT: mov w9, #1895825407
|
|
; CHECK-NEXT: fmov s9, w8
|
|
; CHECK-NEXT: mov x25, #-34359738368
|
|
; CHECK-NEXT: fmov s10, w9
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: mov x26, #34359738367
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: mov h0, v0.h[2]
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: csel x21, xzr, x8, vs
|
|
; CHECK-NEXT: csel x22, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: csel x23, xzr, x8, vs
|
|
; CHECK-NEXT: csel x24, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: csel x8, x25, x1, lt
|
|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x26, x8, gt
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
|
|
; CHECK-NEXT: mov x4, x21
|
|
; CHECK-NEXT: mov x5, x22
|
|
; CHECK-NEXT: mov x6, x23
|
|
; CHECK-NEXT: mov x7, x24
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #112 // =112
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i100> @llvm.fptosi.sat.v4f16.v4i100(<4 x half> %f)
|
|
ret <4 x i100> %x
|
|
}
|
|
|
|
define <4 x i128> @test_signed_v4f16_v4i128(<4 x half> %f) {
|
|
; CHECK-LABEL: test_signed_v4f16_v4i128:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: sub sp, sp, #112 // =112
|
|
; CHECK-NEXT: str d10, [sp, #16] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp d9, d8, [sp, #24] // 16-byte Folded Spill
|
|
; CHECK-NEXT: str x30, [sp, #40] // 8-byte Folded Spill
|
|
; CHECK-NEXT: stp x26, x25, [sp, #48] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x24, x23, [sp, #64] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x22, x21, [sp, #80] // 16-byte Folded Spill
|
|
; CHECK-NEXT: stp x20, x19, [sp, #96] // 16-byte Folded Spill
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 112
|
|
; CHECK-NEXT: .cfi_offset w19, -8
|
|
; CHECK-NEXT: .cfi_offset w20, -16
|
|
; CHECK-NEXT: .cfi_offset w21, -24
|
|
; CHECK-NEXT: .cfi_offset w22, -32
|
|
; CHECK-NEXT: .cfi_offset w23, -40
|
|
; CHECK-NEXT: .cfi_offset w24, -48
|
|
; CHECK-NEXT: .cfi_offset w25, -56
|
|
; CHECK-NEXT: .cfi_offset w26, -64
|
|
; CHECK-NEXT: .cfi_offset w30, -72
|
|
; CHECK-NEXT: .cfi_offset b8, -80
|
|
; CHECK-NEXT: .cfi_offset b9, -88
|
|
; CHECK-NEXT: .cfi_offset b10, -96
|
|
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
|
|
; CHECK-NEXT: mov h1, v0.h[1]
|
|
; CHECK-NEXT: fcvt s8, h1
|
|
; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: mov w8, #-16777216
|
|
; CHECK-NEXT: mov w9, #2130706431
|
|
; CHECK-NEXT: fmov s9, w8
|
|
; CHECK-NEXT: mov x25, #-9223372036854775808
|
|
; CHECK-NEXT: fmov s10, w9
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: mov x26, #9223372036854775807
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: mov h0, v0.h[2]
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: csel x19, xzr, x8, vs
|
|
; CHECK-NEXT: csel x20, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: mov h0, v0.h[3]
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
|
|
; CHECK-NEXT: mov v0.16b, v8.16b
|
|
; CHECK-NEXT: csel x21, xzr, x8, vs
|
|
; CHECK-NEXT: csel x22, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
|
|
; CHECK-NEXT: fcmp s8, s9
|
|
; CHECK-NEXT: csel x8, xzr, x0, lt
|
|
; CHECK-NEXT: csel x9, x25, x1, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csel x9, x26, x9, gt
|
|
; CHECK-NEXT: csinv x8, x8, xzr, le
|
|
; CHECK-NEXT: fcmp s8, s8
|
|
; CHECK-NEXT: fcvt s8, h0
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; CHECK-NEXT: mov v0.16b, v8.16b
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; CHECK-NEXT: csel x23, xzr, x8, vs
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|
; CHECK-NEXT: csel x24, xzr, x9, vs
|
|
; CHECK-NEXT: bl __fixsfti
|
|
; CHECK-NEXT: fcmp s8, s9
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|
; CHECK-NEXT: csel x8, x25, x1, lt
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|
; CHECK-NEXT: csel x9, xzr, x0, lt
|
|
; CHECK-NEXT: fcmp s8, s10
|
|
; CHECK-NEXT: csinv x9, x9, xzr, le
|
|
; CHECK-NEXT: csel x8, x26, x8, gt
|
|
; CHECK-NEXT: fcmp s8, s8
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|
; CHECK-NEXT: csel x9, xzr, x9, vs
|
|
; CHECK-NEXT: mov x2, x19
|
|
; CHECK-NEXT: mov x3, x20
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|
; CHECK-NEXT: mov x4, x21
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|
; CHECK-NEXT: mov x5, x22
|
|
; CHECK-NEXT: mov x6, x23
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|
; CHECK-NEXT: mov x7, x24
|
|
; CHECK-NEXT: ldp x20, x19, [sp, #96] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x22, x21, [sp, #80] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x24, x23, [sp, #64] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldp x26, x25, [sp, #48] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr x30, [sp, #40] // 8-byte Folded Reload
|
|
; CHECK-NEXT: ldp d9, d8, [sp, #24] // 16-byte Folded Reload
|
|
; CHECK-NEXT: ldr d10, [sp, #16] // 8-byte Folded Reload
|
|
; CHECK-NEXT: csel x1, xzr, x8, vs
|
|
; CHECK-NEXT: fmov d0, x9
|
|
; CHECK-NEXT: mov v0.d[1], x1
|
|
; CHECK-NEXT: fmov x0, d0
|
|
; CHECK-NEXT: add sp, sp, #112 // =112
|
|
; CHECK-NEXT: ret
|
|
%x = call <4 x i128> @llvm.fptosi.sat.v4f16.v4i128(<4 x half> %f)
|
|
ret <4 x i128> %x
|
|
}
|
|
|