David Green ba04a35893 [ARM] Add an extra fold for f32 extract(vdup(i32)) ... This adds another small fold for extract of a vdup, between a i32 and a f32, converting to a BITCAST. This allows some extra folding to happen, simplifying the resulting code. Differential Revision: https://reviews.llvm.org/D104857		2021-06-28 08:54:03 +01:00
..
Analysis	[SCEV] Support single-cond range check idiom in applyLoopGuards.	2021-06-25 10:24:40 +01:00
Assembler	OpaquePtr: Reject 'ptr*' again when parsing textual IR	2021-06-25 15:18:44 -07:00
Bindings
Bitcode	[BitCode] Add noprofile to getAttrFromCode()	2021-06-27 11:59:57 -07:00
BugPoint
CodeGen	[ARM] Add an extra fold for f32 extract(vdup(i32))	2021-06-28 08:54:03 +01:00
DebugInfo	PR37255: DebugInfo: LTO with -g inlined into -gmlt combined with Split DWARF without CU cross-references	2021-06-27 14:40:38 -07:00
Demangle
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation	[DFSan] Change shadow and origin memory layouts to match MSan.	2021-06-25 17:00:38 -07:00
Integer
JitListener
Linker
LTO
MachineVerifier
MC	[llvm-objdump] Prefix memory operand addresses with '0x'	2021-06-28 14:25:21 +07:00
Object	[AMDGPU] Add gfx1035 target	2021-06-24 14:32:41 -04:00
ObjectYAML
Other	[OpaquePtr] Enumerate GlobalAlias value type	2021-06-25 21:21:10 +02:00
SafepointIRVerifier
Support
SymbolRewriter
TableGen
ThinLTO/X86
tools	[llvm-objdump] Print memory operand addresses as regular comments	2021-06-28 14:25:22 +07:00
Transforms	Revert "[Test] Add XFAIL test for PR50918"	2021-06-28 12:56:13 +07:00
Unit
Verifier	[Verifier] Support masked load/store with opaque pointers	2021-06-26 18:11:59 +02:00
YAMLParser
.clang-format
CMakeLists.txt	[IRSim] Adding basic implementation of llvm-sim.	2021-06-23 14:38:58 -05:00
lit.cfg.py	[IRSim] Adding basic implementation of llvm-sim.	2021-06-23 14:38:58 -05:00
lit.site.cfg.py.in
TestRunner.sh