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58 lines
2.5 KiB
ArmAsm
58 lines
2.5 KiB
ArmAsm
// RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-NONARM %s
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// RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-NONARM %s
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// RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>/dev/null | FileCheck --check-prefix=CHECK-ARM %s
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// lsl #0 is actually mov, so here we check that it behaves the same as
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// mov with regards to the permitted registers and how it behaves in an
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// IT block.
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// Non-flags-setting with only one of source and destination SP should
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// be OK
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lsl sp, r0, #0
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lsl r0, sp, #0
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// CHECK-NONARM: mov.w sp, r0 @ encoding: [0x4f,0xea,0x00,0x0d]
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// CHECK-NONARM: mov.w r0, sp @ encoding: [0x4f,0xea,0x0d,0x00]
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// CHECK-ARM: mov sp, r0 @ encoding: [0x00,0xd0,0xa0,0xe1]
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// CHECK-ARM: mov r0, sp @ encoding: [0x0d,0x00,0xa0,0xe1]
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//FIXME: pre-ARMv8 we give an error for these instructions
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//mov sp, r0, lsl #0
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//mov r0, sp, lsl #0
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// LSL #0 in IT block should select the 32-bit encoding
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itt eq
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lsleq r0, r1, #0
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lslseq r0, r1, #0
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itt gt
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lslgt r0, r1, #0
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lslsgt r0, r1, #0
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// CHECK-NONARM: moveq.w r0, r1 @ encoding: [0x4f,0xea,0x01,0x00]
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// CHECK-NONARM: movseq.w r0, r1 @ encoding: [0x5f,0xea,0x01,0x00]
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// CHECK-NONARM: movgt.w r0, r1 @ encoding: [0x4f,0xea,0x01,0x00]
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// CHECK-NONARM: movsgt.w r0, r1 @ encoding: [0x5f,0xea,0x01,0x00]
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// CHECK-ARM: moveq r0, r1 @ encoding: [0x01,0x00,0xa0,0x01]
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// CHECK-ARM: movseq r0, r1 @ encoding: [0x01,0x00,0xb0,0x01]
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// CHECK-ARM: movgt r0, r1 @ encoding: [0x01,0x00,0xa0,0xc1]
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// CHECK-ARM: movsgt r0, r1 @ encoding: [0x01,0x00,0xb0,0xc1]
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itt eq
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moveq r0, r1, lsl #0
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movseq r0, r1, lsl #0
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itt gt
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movgt r0, r1, lsl #0
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movsgt r0, r1, lsl #0
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// CHECK-NONARM: moveq.w r0, r1 @ encoding: [0x4f,0xea,0x01,0x00]
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// CHECK-NONARM: movseq.w r0, r1 @ encoding: [0x5f,0xea,0x01,0x00]
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// CHECK-NONARM: movgt.w r0, r1 @ encoding: [0x4f,0xea,0x01,0x00]
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// CHECK-NONARM: movsgt.w r0, r1 @ encoding: [0x5f,0xea,0x01,0x00]
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// CHECK-ARM: moveq r0, r1 @ encoding: [0x01,0x00,0xa0,0x01]
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// CHECK-ARM: movseq r0, r1 @ encoding: [0x01,0x00,0xb0,0x01]
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// CHECK-ARM: movgt r0, r1 @ encoding: [0x01,0x00,0xa0,0xc1]
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// CHECK-ARM: movsgt r0, r1 @ encoding: [0x01,0x00,0xb0,0xc1]
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