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llvm-mirror/lib/Target/AMDGPU
Jay Foad ccd7445730 [AMDGPU] getMemOperandsWithOffset: add resource operand for BUF instructions
Summary:
This prevents unwanted clustering of BUF instructions with the same
vaddr but different resource descriptors.

Reviewers: rampitec, arsenm, nhaehnle

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73867
2020-02-03 17:06:09 +00:00
..
AsmParser Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
Disassembler CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
MCTargetDesc Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
Utils Reapply "AMDGPU: Cleanup and fix SMRD offset handling" 2020-01-31 06:01:28 -08:00
AMDGPU.h [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
AMDGPU.td [AMDGPU] w/a for gfx908 mfma SrcC literal HW bug 2019-08-23 22:09:58 +00:00
AMDGPUAliasAnalysis.cpp AMDGPU: Improve alias analysis for GDS 2019-07-17 11:22:19 +00:00
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp AMDGPU: Simplify getAddressSpace calls 2019-10-31 07:51:38 -07:00
AMDGPUAnnotateKernelFeatures.cpp Use llvm::StringLiteral instead of StringRef in few places 2019-09-20 14:31:42 +00:00
AMDGPUAnnotateUniformValues.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h AMDGPU: Fix Register copypaste error 2019-09-05 23:07:10 +00:00
AMDGPUAsmPrinter.cpp CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
AMDGPUAsmPrinter.h [AMDGPU] separate accounting for agprs 2019-10-02 00:26:58 +00:00
AMDGPUAtomicOptimizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDGPUCallingConv.td AMDGPU: Allow i16 shader arguments 2020-01-27 06:55:32 -08:00
AMDGPUCallLowering.cpp [GlobalISel] Tidy up unnecessary calls to createGenericVirtualRegister 2020-01-31 17:07:16 +00:00
AMDGPUCallLowering.h AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC 2019-09-09 23:06:13 +00:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Implement FDIV optimizations in AMDGPUCodeGenPrepare 2020-01-23 16:57:43 -08:00
AMDGPUCombine.td AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY 2020-01-31 06:58:04 -08:00
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
AMDGPUFrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
AMDGPUGenRegisterBankInfo.def AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT 2020-01-22 10:57:50 -05:00
AMDGPUGISel.td AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY 2020-01-31 06:58:04 -08:00
AMDGPUGlobalISelUtils.cpp AMDGPU/GlobalISel: Add new utils file 2020-01-03 15:25:50 -05:00
AMDGPUGlobalISelUtils.h AMDGPU/GlobalISel: Add new utils file 2020-01-03 15:25:50 -05:00
AMDGPUHSAMetadataStreamer.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPUHSAMetadataStreamer.h [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
AMDGPUInline.cpp [NFC] Refactor InlineResult for readability 2020-01-15 13:34:20 -08:00
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16 2020-01-29 08:24:31 -08:00
AMDGPUInstructions.td AMDGPU: Don't check constant address space for atomic stores 2020-01-24 12:15:09 -08:00
AMDGPUInstructionSelector.cpp AMDGPU/GlobalISel: Select global MUBUF atomicrmw 2020-01-31 06:05:41 -08:00
AMDGPUInstructionSelector.h AMDGPU/GlobalISel: Select global MUBUF atomicrmw 2020-01-31 06:05:41 -08:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Fix potential use of undefined value 2020-01-31 10:38:58 -05:00
AMDGPUISelLowering.cpp AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16 2020-01-29 08:24:31 -08:00
AMDGPUISelLowering.h AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16 2020-01-29 08:24:31 -08:00
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Use more wide vector load/stores 2020-02-01 10:47:21 -05:00
AMDGPULegalizerInfo.h AMDGPU/GlobalISel: Handle s64->s64 G_FPTOSI/G_FPTOUI 2020-01-30 08:46:37 -05:00
AMDGPULibCalls.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULibFunc.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULibFunc.h Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULowerIntrinsics.cpp
AMDGPULowerKernelArguments.cpp [Alignement][NFC] Deprecate untyped CreateAlignedLoad 2020-01-23 13:34:32 +01:00
AMDGPULowerKernelAttributes.cpp
AMDGPUMachineCFGStructurizer.cpp [AMDGPU] Fixes -Wrange-loop-analysis warnings 2019-12-22 19:39:28 +01:00
AMDGPUMachineFunction.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUMachineFunction.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMCInstLower.cpp [MC] Add parameter Address to MCInstPrinter::printInst 2020-01-06 20:42:22 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp Fix parameter name comments using clang-tidy. NFC. 2019-07-16 04:46:31 +00:00
AMDGPUPerfHintAnalysis.cpp AMDGPU: Fix assert in clang test 2019-07-05 21:09:53 +00:00
AMDGPUPerfHintAnalysis.h AMDGPU: Make AMDGPUPerfHintAnalysis an SCC pass 2019-07-05 20:26:13 +00:00
AMDGPUPreLegalizerCombiner.cpp AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY 2020-01-31 06:58:04 -08:00
AMDGPUPrintfRuntimeBinding.cpp [AMDGPU] add support for hostcall buffer pointer as hidden kernel argument 2019-11-20 15:53:55 +05:30
AMDGPUPromoteAlloca.cpp [Alignement][NFC] Deprecate untyped CreateAlignedLoad 2020-01-23 13:34:32 +01:00
AMDGPUPropagateAttributes.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPUPTNote.h
AMDGPURegisterBankInfo.cpp AMDGPU/GlobalISel: Reduce indentation 2020-02-03 05:41:14 -08:00
AMDGPURegisterBankInfo.h AMDPGPU/GlobalISel: Select more MUBUF global addressing modes 2020-01-27 07:28:36 -08:00
AMDGPURegisterBanks.td AMDGPU/GlobalISel: Replace handling of boolean values 2020-01-06 18:26:42 -05:00
AMDGPURegisterInfo.cpp AMDGPU: Remove outdated comment 2020-01-16 14:54:27 -05:00
AMDGPURegisterInfo.h AMDGPU/GlobalISel: Handle more G_INSERT cases 2019-10-07 19:16:26 +00:00
AMDGPURegisterInfo.td [AMDGPU] gfx908 register file changes 2019-07-09 19:41:51 +00:00
AMDGPURewriteOutArguments.cpp [Alignment][NFC] Use Align with CreateAlignedStore 2020-01-23 17:34:32 +01:00
AMDGPUSearchableTables.td [AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/stores 2019-11-20 22:59:30 +01:00
AMDGPUSubtarget.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
AMDGPUSubtarget.h [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi 2020-01-28 10:52:17 +00:00
AMDGPUTargetMachine.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI 2020-01-24 10:39:40 -08:00
AMDGPUTargetTransformInfo.h Resubmit: [DA][TTI][AMDGPU] Add option to select GPUDA with TTI 2020-01-24 10:39:40 -08:00
AMDGPUUnifyDivergentExitNodes.cpp AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns 2020-01-30 10:55:02 +01:00
AMDGPUUnifyMetadata.cpp [AMDGPU] Fixes -Wrange-loop-analysis warnings 2019-12-22 19:39:28 +01:00
AMDILCFGStructurizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AMDKernelCodeT.h
BUFInstructions.td AMDGPU: Don't use separate cache arguments for s_buffer_load node 2020-01-30 14:15:26 -08:00
CaymanInstructions.td
CMakeLists.txt [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
DSInstructions.td [AMDGPU][GlobalISel] Select 8-byte LDS Ops with 4-byte alignment 2020-01-29 10:42:12 -08:00
EvergreenInstructions.td AMDGPU: Start redefining atomic PatFrags 2019-08-01 03:25:52 +00:00
FLATInstructions.td AMDGPU/GlobalISel: Fix not using global atomics on gfx9+ 2020-01-27 07:42:42 -08:00
GCNDPPCombine.cpp [AMDGPU][DPP] Corrected DPP combiner 2019-11-20 15:56:45 +03:00
GCNHazardRecognizer.cpp Make more use of MachineInstr::mayLoadOrStore. 2019-12-19 11:51:52 +00:00
GCNHazardRecognizer.h [AMDGPU] gfx908 hazard recognizer 2019-07-11 21:30:34 +00:00
GCNILPSched.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
GCNIterativeScheduler.cpp [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNIterativeScheduler.h [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNMinRegStrategy.cpp [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNNSAReassign.cpp AMDGPU/GFX10: Fix NSA reassign pass when operands are undef 2020-02-01 22:41:40 +01:00
GCNProcessors.td [AMDGPU] gfx908 target 2019-07-09 18:10:06 +00:00
GCNRegBankReassign.cpp AMDGPU: Fix ubsan error 2020-01-23 15:05:47 -05:00
GCNRegPressure.cpp [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNRegPressure.h [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNSchedStrategy.cpp [AMDGPU] Attempt to reschedule withou clustering 2020-01-27 10:27:16 -08:00
GCNSchedStrategy.h [AMDGPU] Attempt to reschedule withou clustering 2020-01-27 10:27:16 -08:00
LLVMBuild.txt
MIMGInstructions.td [AMDGPU] deduplicate tablegen predicates 2019-11-04 12:19:17 -08:00
R600.td
R600AsmPrinter.cpp [NFC] Fix trivial typos in comments 2020-01-06 10:50:26 +00:00
R600AsmPrinter.h
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600FrameLowering.cpp
R600FrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
R600InstrFormats.td
R600InstrInfo.cpp Update spelling of {analyze,insert,remove}Branch in strings and comments 2020-01-21 10:15:38 -06:00
R600InstrInfo.h Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
R600Instructions.td AMDGPU: Eliminate more legacy codepred address space PatFrags 2020-01-09 10:29:32 -05:00
R600ISelLowering.cpp [DAG] Add helper for creating constant vector index with correct type. NFC. 2020-01-18 01:23:36 -05:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600MachineScheduler.h
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Packetizer.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
R600Processors.td
R600RegisterInfo.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
R600RegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
R600RegisterInfo.td
R600Schedule.td
R700Instructions.td
SIAddIMGInit.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
SIAnnotateControlFlow.cpp AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break 2020-02-03 07:02:05 -08:00
SIDefines.h [AMDGPU] Added MI bit IsDOT 2019-09-17 17:56:13 +00:00
SIFixSGPRCopies.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIFixupVectorISel.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp [amdgpu] Remove unused header. NFC. 2020-01-08 11:32:09 -05:00
SIFormMemoryClauses.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIFrameLowering.cpp Reapply "AMDGPU: Cleanup and fix SMRD offset handling" 2020-01-31 06:01:28 -08:00
SIFrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
SIInsertSkips.cpp Resubmit: [AMDGPU] Invert the handling of skip insertion. 2020-01-22 13:18:32 +09:00
SIInsertWaitcnts.cpp [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi 2020-01-28 10:52:17 +00:00
SIInstrFormats.td [AMDGPU] Added MI bit IsDOT 2019-09-17 17:56:13 +00:00
SIInstrInfo.cpp [AMDGPU] getMemOperandsWithOffset: add resource operand for BUF instructions 2020-02-03 17:06:09 +00:00
SIInstrInfo.h [NFC] unsigned->Register in storeRegTo/loadRegFromStack 2020-02-03 14:22:16 +01:00
SIInstrInfo.td AMDGPU: Don't use separate cache arguments for s_buffer_load node 2020-01-30 14:15:26 -08:00
SIInstructions.td AMDGPU/GlobalISel: Combine FMIN_LEGACY/FMAX_LEGACY 2020-01-31 06:58:04 -08:00
SIISelLowering.cpp [Alignment][NFC] Use Align for getMemcpy/Memmove/Memset 2020-02-03 17:13:19 +01:00
SIISelLowering.h [NFC] Introduce a type to model memory operation 2020-01-31 17:29:01 +01:00
SILoadStoreOptimizer.cpp Reapply "AMDGPU: Cleanup and fix SMRD offset handling" 2020-01-31 06:01:28 -08:00
SILowerControlFlow.cpp Resubmit: [AMDGPU] Invert the handling of skip insertion. 2020-01-22 13:18:32 +09:00
SILowerI1Copies.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SILowerSGPRSpills.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIMachineFunctionInfo.cpp AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
SIMachineFunctionInfo.h AMDGPU: Refactor treatment of denormal mode 2019-11-19 19:55:43 +05:30
SIMachineScheduler.cpp [AMDGPU] override isHighLatencyDef 2020-01-29 08:01:29 -08:00
SIMachineScheduler.h AMDGPU/SI: make ~SIScheduleBlockCreator trivial 2019-11-11 21:51:59 -08:00
SIMemoryLegalizer.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
SIModeRegister.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
SIOptimizeExecMasking.cpp AMDGPU: Use Register 2019-12-27 16:53:21 -05:00
SIOptimizeExecMaskingPreRA.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIPeepholeSDWA.cpp AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA 2019-12-02 12:08:49 +00:00
SIPostRABundler.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
SIPreAllocateWWMRegs.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
SIProgramInfo.h [AMDGPU] separate accounting for agprs 2019-10-02 00:26:58 +00:00
SIRegisterInfo.cpp [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
SIRegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
SIRegisterInfo.td AMDGPU: Make VReg_1 only include 1 artificial register 2019-10-28 20:51:51 -07:00
SIRemoveShortExecBranches.cpp [AMDGPU] Don't remove short branches over kills 2020-02-03 09:26:52 +00:00
SISchedule.td [AMDGPU] gfx908 scheduling 2019-07-11 21:25:00 +00:00
SIShrinkInstructions.cpp AMDGPU: Don't fold S_NOPs with implicit operands 2019-10-30 14:40:56 -07:00
SIWholeQuadMode.cpp [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM lowering. 2020-01-10 23:01:19 -05:00
SMInstructions.td AMDGPU: Don't use separate cache arguments for s_buffer_load node 2020-01-30 14:15:26 -08:00
SOPInstructions.td [AMDGPU] fixed divergence driven shift operations selection 2020-01-31 20:49:56 +03:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp 2020-01-22 11:43:53 -05:00
VOP2Instructions.td [AMDGPU] fixed divergence driven shift operations selection 2020-01-31 20:49:56 +03:00
VOP3Instructions.td [AMDGPU] fixed divergence driven shift operations selection 2020-01-31 20:49:56 +03:00
VOP3PInstructions.td AMDGPU/GlobalISel: Select permlane16/permlanex16 2020-01-29 17:55:31 -05:00
VOPCInstructions.td AMDGPU: Remove VOP3Mods0Clamp0OMod 2020-01-07 15:10:08 -05:00
VOPInstructions.td [AMDGPU] copy OtherPredicates from pseudo to VOP3_Real 2019-09-26 21:06:17 +00:00