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ebd7d35206
Fixed an issue with vector usage of TargetLowering::isConstTrueVal / TargetLowering::isConstFalseVal boolean result matching. The comment said we shouldn't handle constant splat vectors with undef elements. But the the actual code was returning false if the build vector contained no undef elements.... This patch now ignores the number of undefs (getConstantSplatNode will return null if the build vector is all undefs). The change has also unearthed a couple of missed opportunities in AVX512 comparison code that will need to be addressed. Differential Revision: https://reviews.llvm.org/D26031 llvm-svn: 286238
74 lines
2.7 KiB
LLVM
74 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=X64
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define void @and_masks(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind uwtable noinline ssp {
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; X32-LABEL: and_masks:
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; X32: ## BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: vmovups (%edx), %ymm0
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; X32-NEXT: vmovups (%ecx), %ymm1
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; X32-NEXT: vcmpltps %ymm0, %ymm1, %ymm1
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; X32-NEXT: vmovups (%eax), %ymm2
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; X32-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
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; X32-NEXT: vandps %ymm1, %ymm0, %ymm0
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; X32-NEXT: vandps LCPI0_0, %ymm0, %ymm0
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; X32-NEXT: vmovaps %ymm0, (%eax)
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; X32-NEXT: vzeroupper
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; X32-NEXT: retl
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;
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; X64-LABEL: and_masks:
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; X64: ## BB#0:
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; X64-NEXT: vmovups (%rdi), %ymm0
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; X64-NEXT: vmovups (%rsi), %ymm1
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; X64-NEXT: vcmpltps %ymm0, %ymm1, %ymm1
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; X64-NEXT: vmovups (%rdx), %ymm2
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; X64-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
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; X64-NEXT: vandps %ymm1, %ymm0, %ymm0
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; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: vmovaps %ymm0, (%rax)
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%v0 = load <8 x float>, <8 x float>* %a, align 16
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%v1 = load <8 x float>, <8 x float>* %b, align 16
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%m0 = fcmp olt <8 x float> %v1, %v0
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%v2 = load <8 x float>, <8 x float>* %c, align 16
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%m1 = fcmp olt <8 x float> %v2, %v0
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%mand = and <8 x i1> %m1, %m0
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%r = zext <8 x i1> %mand to <8 x i32>
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store <8 x i32> %r, <8 x i32>* undef, align 32
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ret void
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}
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define void @neg_masks(<8 x float>* %a, <8 x float>* %b, <8 x float>* %c) nounwind uwtable noinline ssp {
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; X32-LABEL: neg_masks:
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; X32: ## BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: vmovups (%ecx), %ymm0
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; X32-NEXT: vcmpnltps (%eax), %ymm0, %ymm0
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; X32-NEXT: vandps LCPI1_0, %ymm0, %ymm0
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; X32-NEXT: vmovaps %ymm0, (%eax)
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; X32-NEXT: vzeroupper
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; X32-NEXT: retl
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;
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; X64-LABEL: neg_masks:
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; X64: ## BB#0:
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; X64-NEXT: vmovups (%rsi), %ymm0
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; X64-NEXT: vcmpnltps (%rdi), %ymm0, %ymm0
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; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
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; X64-NEXT: vmovaps %ymm0, (%rax)
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%v0 = load <8 x float>, <8 x float>* %a, align 16
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%v1 = load <8 x float>, <8 x float>* %b, align 16
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%m0 = fcmp olt <8 x float> %v1, %v0
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%mand = xor <8 x i1> %m0, <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>
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%r = zext <8 x i1> %mand to <8 x i32>
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store <8 x i32> %r, <8 x i32>* undef, align 32
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ret void
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}
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