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GC
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GlobalISel
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[GlobalISel] Add support for address-taken basic blocks
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2017-01-05 13:27:52 +00:00 |
3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
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4char-promote.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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[X86][SSE] Fix domains for VZEXT_LOAD type instructions
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2016-12-15 16:05:29 +00:00 |
2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
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2017-01-11 19:55:19 +00:00 |
2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-02-IllegalResultType.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-01-31-BigShift.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-03-BTHang.ll
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2009-03-05-burr-list-crash.ll
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2009-03-07-FPConstSelect.ll
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2009-03-09-APIntCrash.ll
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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2009-03-23-i80-fp80.ll
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2009-03-23-LinearScanBug.ll
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2009-03-23-MultiUseSched.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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[X86][FastISel] Fix lowering of overflow result on AVX512 targets
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2016-11-15 13:29:23 +00:00 |
2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-sitofpCrash.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-VZextByteShort.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
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2009-08-08-CastError.ll
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2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-19-EmergencySpill.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
|
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2010-04-06-SSEDomainFixCrash.ll
|
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2010-04-08-CoalescerBug.ll
|
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2010-04-13-AnalyzeBranchCrash.ll
|
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2010-04-21-CoalescerBug.ll
|
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2010-04-29-CoalescerCrash.ll
|
|
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2010-04-30-LocalAlloc-LandingPad.ll
|
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2010-05-03-CoalescerSubRegClobber.ll
|
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2010-05-05-LocalAllocEarlyClobber.ll
|
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
|
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2010-05-10-DAGCombinerBug.ll
|
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2010-05-12-FastAllocKills.ll
|
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2010-05-16-nosseconversion.ll
|
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2010-05-25-DotDebugLoc.ll
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2010-05-26-DotDebugLoc.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
2010-05-26-FP_TO_INT-crash.ll
|
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2010-05-28-Crash.ll
|
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2010-06-01-DeadArg-DbgInfo.ll
|
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2010-06-09-FastAllocRegisters.ll
|
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-asm-alignstack.ll
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2010-07-02-UnfoldBug.ll
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2010-07-06-asm-RIP.ll
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2010-07-06-DbgCrash.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-01-RemoveCopyByCommutingDef.ll
|
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2010-09-16-asmcrash.ll
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2010-09-16-EmptyFilename.ll
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2010-09-17-SideEffectsInChain.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
|
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2011-03-02-DAGCombiner.ll
|
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2011-03-08-Sched-crash.ll
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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2011-06-03-x87chain.ll
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2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
|
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2011-06-14-mmx-inlineasm.ll
|
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2011-06-14-PreschedRegalias.ll
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2011-06-19-QuicksortCoalescerBug.ll
|
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2011-07-13-BadFrameIndexDisplacement.ll
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2011-08-23-PerformSubCombine128.ll
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2011-08-23-Trampoline.ll
|
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
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2011-10-11-SpillDead.ll
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2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
|
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2011-10-18-FastISel-VectorParams.ll
|
|
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2011-10-19-LegelizeLoad.ll
|
|
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2011-10-19-widen_vselect.ll
|
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values.
|
2016-11-24 21:48:50 +00:00 |
2011-10-21-widen-cmp.ll
|
[X86][SSE] Add initial support for combining (V)PMOVZX with shuffles.
|
2016-11-28 17:58:19 +00:00 |
2011-10-27-tstore.ll
|
|
|
2011-10-30-padd.ll
|
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2011-11-07-LegalizeBuildVector.ll
|
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2011-11-22-AVX2-Domains.ll
|
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2011-11-30-or.ll
|
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2011-12-8-bitcastintprom.ll
|
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2011-12-06-AVXVectorExtractCombine.ll
|
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2011-12-06-BitcastVectorGlobal.ll
|
|
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2011-12-08-AVXISelBugs.ll
|
|
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2011-12-15-vec_shift.ll
|
|
|
2011-12-26-extractelement-duplicate-load.ll
|
[X86][SSE] Regenerate test.
|
2016-12-07 13:05:04 +00:00 |
2011-12-28-vselecti8.ll
|
|
|
2011-20-21-zext-ui2fp.ll
|
|
|
2012-1-10-buildvector.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
2012-01-10-UndefExceptionEdge.ll
|
|
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2012-01-11-split-cv.ll
|
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2012-01-12-extract-sv.ll
|
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2012-01-16-mfence-nosse-flags.ll
|
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2012-01-18-vbitcast.ll
|
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2012-02-12-dagco.ll
|
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2012-02-14-scalar.ll
|
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2012-02-23-mmx-inlineasm.ll
|
|
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2012-02-29-CoalescerBug.ll
|
|
|
2012-03-15-build_vector_wl.ll
|
|
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2012-03-20-LargeConstantExpr.ll
|
|
|
2012-03-26-PostRALICMBug.ll
|
|
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2012-04-09-TwoAddrPassBug.ll
|
|
|
2012-04-26-sdglue.ll
|
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2012-05-17-TwoAddressBug.ll
|
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2012-05-19-CoalescerCrash.ll
|
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2012-07-10-extload64.ll
|
|
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2012-07-10-shufnorm.ll
|
|
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2012-07-15-broadcastfold.ll
|
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2012-07-15-BuildVectorPromote.ll
|
|
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2012-07-15-tconst_shl.ll
|
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2012-07-15-vshl.ll
|
|
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2012-07-16-fp2ui-i1.ll
|
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2012-07-16-LeaUndef.ll
|
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2012-07-17-vtrunc.ll
|
|
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2012-07-23-select_cc.ll
|
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2012-08-07-CmpISelBug.ll
|
|
|
2012-08-16-setcc.ll
|
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2012-08-17-legalizer-crash.ll
|
|
|
2012-08-28-UnsafeMathCrash.ll
|
|
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2012-09-13-dagco-fneg.ll
|
|
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2012-09-28-CGPBug.ll
|
|
|
2012-10-02-DAGCycle.ll
|
|
|
2012-10-03-DAGCycle.ll
|
|
|
2012-10-18-crash-dagco.ll
|
|
|
2012-11-28-merge-store-alias.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
2012-11-30-handlemove-dbg.ll
|
|
|
2012-11-30-misched-dbg.ll
|
|
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2012-11-30-regpres-dbg.ll
|
|
|
2012-12-1-merge-multiple.ll
|
|
|
2012-12-06-python27-miscompile.ll
|
|
|
2012-12-12-DAGCombineCrash.ll
|
|
|
2012-12-14-v8fp80-crash.ll
|
|
|
2012-12-19-NoImplicitFloat.ll
|
|
|
2013-01-09-DAGCombineBug.ll
|
|
|
2013-03-13-VEX-DestReg.ll
|
|
|
2013-05-06-ConactVectorCrash.ll
|
|
|
2013-10-14-FastISel-incorrect-vreg.ll
|
|
|
2014-05-29-factorial.ll
|
|
|
2014-08-29-CompactUnwind.ll
|
|
|
9601.ll
|
|
|
20090313-signext.ll
|
|
|
abi-isel.ll
|
|
|
absolute-bit-mask.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-bt.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-constant.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-rotate.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
add32ri8.ll
|
|
|
add_shl_constant.ll
|
|
|
add-ext.ll
|
|
|
add-of-carry.ll
|
|
|
add-sub-nsw-nuw.ll
|
[DAG] disable nsw/nuw for add/sub/mul when simplifying based on demanded bits (PR30841)
|
2016-10-31 23:28:45 +00:00 |
add.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
adde-carry.ll
|
|
|
addr-label-difference.ll
|
|
|
addr-mode-matcher.ll
|
|
|
addr-of-ret-addr.ll
|
|
|
address-type-promotion-constantexpr.ll
|
|
|
adx-intrinsics.ll
|
|
|
aes_intrinsics.ll
|
|
|
alias-gep.ll
|
|
|
aliases.ll
|
|
|
aligned-comm.ll
|
|
|
aligned-variadic.ll
|
|
|
alignment-2.ll
|
|
|
alignment.ll
|
|
|
all-ones-vector.ll
|
|
|
alldiv-divdi3.ll
|
|
|
alloca-align-rounding-32.ll
|
|
|
alloca-align-rounding.ll
|
|
|
allrem-moddi3.ll
|
|
|
and-encoding.ll
|
|
|
and-load-fold.ll
|
|
|
and-or-fold.ll
|
|
|
and-su.ll
|
|
|
andimm8.ll
|
|
|
anyext.ll
|
|
|
anyregcc-crash.ll
|
|
|
anyregcc.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
apm.ll
|
|
|
AppendingLinkage.ll
|
|
|
arg-cast.ll
|
|
|
asm-block-labels.ll
|
|
|
asm-global-imm.ll
|
|
|
asm-indirect-mem.ll
|
|
|
asm-invalid-register-class-crasher.ll
|
|
|
asm-label2.ll
|
|
|
asm-label.ll
|
|
|
asm-mismatched-types.ll
|
|
|
asm-modifier-P.ll
|
|
|
asm-modifier.ll
|
|
|
asm-reg-type-mismatch.ll
|
|
|
asm-reject-reg-type-mismatch.ll
|
|
|
atom-call-reg-indirect-foldedreload32.ll
|
|
|
atom-call-reg-indirect-foldedreload64.ll
|
|
|
atom-call-reg-indirect.ll
|
|
|
atom-cmpb.ll
|
|
|
atom-fixup-lea1.ll
|
|
|
atom-fixup-lea2.ll
|
|
|
atom-fixup-lea3.ll
|
|
|
atom-fixup-lea4.ll
|
|
|
atom-lea-addw-bug.ll
|
|
|
atom-lea-sp.ll
|
|
|
atom-pad-short-functions.ll
|
|
|
atom-sched.ll
|
|
|
atom-shuf.ll
|
|
|
atomic8.ll
|
|
|
atomic16.ll
|
|
|
atomic32.ll
|
|
|
atomic64.ll
|
|
|
atomic128.ll
|
|
|
atomic6432.ll
|
|
|
atomic_add.ll
|
|
|
atomic_idempotent.ll
|
|
|
atomic_mi.ll
|
|
|
atomic_op.ll
|
|
|
atomic-dagsched.ll
|
|
|
atomic-eflags-reuse.ll
|
Re-commit r289955: [X86] Fold (setcc (cmp (atomic_load_add x, -C) C), COND) to (setcc (LADD x, -C), COND) (PR31367)
|
2017-01-11 01:36:57 +00:00 |
atomic-flags.ll
|
|
|
atomic-load-store-wide.ll
|
|
|
atomic-load-store.ll
|
|
|
atomic-minmax-i6432.ll
|
|
|
atomic-non-integer.ll
|
|
|
atomic-ops-ancient-64.ll
|
|
|
atomic-or.ll
|
|
|
atomic-pointer.ll
|
|
|
Atomics-64.ll
|
|
|
attribute-sections.ll
|
|
|
avg.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
avoid_complex_am.ll
|
|
|
avoid-lea-scale2.ll
|
|
|
avoid-loop-align-2.ll
|
|
|
avoid-loop-align.ll
|
|
|
avx1-logical-load-folding.ll
|
|
|
avx2-arith.ll
|
[X86][AVX2] Regenerate arithmetic tests
|
2017-01-07 20:38:36 +00:00 |
avx2-cmp.ll
|
|
|
avx2-conversions.ll
|
|
|
avx2-fma-fneg-combine.ll
|
|
|
avx2-gather.ll
|
|
|
avx2-intrinsics-fast-isel.ll
|
|
|
avx2-intrinsics-x86-upgrade.ll
|
|
|
avx2-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx2-logic.ll
|
|
|
avx2-nontemporal.ll
|
|
|
avx2-phaddsub.ll
|
|
|
avx2-pmovxrm.ll
|
|
|
avx2-shift.ll
|
|
|
avx2-vbroadcast.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx2-vbroadcasti128.ll
|
|
|
avx2-vector-shifts.ll
|
|
|
avx2-vperm.ll
|
|
|
avx512-any_extend_load.ll
|
[X86] Attempt to pre-truncate arithmetic operations if useful
|
2017-01-04 08:05:42 +00:00 |
avx512-arith.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-bugfix-23634.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-bugfix-25270.ll
|
|
|
avx512-bugfix-26264.ll
|
|
|
avx512-build-vector.ll
|
|
|
avx512-calling-conv.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-cmp-kor-sequence.ll
|
|
|
avx512-cmp.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
avx512-cvt.ll
|
[AVX-512] Improve lowering of zero_extend of v4i1 to v4i32 and v2i1 to v2i64 with VLX, but no DQ or BW support.
|
2017-01-12 06:49:12 +00:00 |
avx512-ext.ll
|
[AVX-512] Change another pattern that was using BLENDM to use masked moves. A future patch will conver it back to BLENDM if its beneficial to register allocation.
|
2017-01-09 04:19:34 +00:00 |
avx512-extract-subvector.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512-fma-intrinsics.ll
|
|
|
avx512-fma.ll
|
|
|
avx512-fsel.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512-gather-scatter-intrin.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-i1test.ll
|
|
|
avx512-inc-dec.ll
|
|
|
avx512-insert-extract.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-intel-ocl.ll
|
|
|
avx512-intrinsics-fast-isel.ll
|
|
|
avx512-intrinsics-upgrade.ll
|
[AVX-512] Update vextract64x4 intrinsic upgrade test cases to use a legal immediate so they test the instruction selection correctly.
|
2017-01-05 01:34:55 +00:00 |
avx512-intrinsics.ll
|
[AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors. There are some codegen problems here that I'll try to fix in future commits.
|
2017-01-03 05:45:57 +00:00 |
avx512-load-store.ll
|
[X86][AVX512] Add patterns for all variants of VMOVSS/VMOVSD instructions.
|
2016-11-13 14:29:32 +00:00 |
avx512-logic.ll
|
|
|
avx512-mask-bugfix.ll
|
|
|
avx512-mask-op.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
avx512-mask-spills.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512-mask-zext-bugfix.ll
|
|
|
avx512-masked_memop-16-8.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-masked-memop-64-32.ll
|
|
|
avx512-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-nontemporal.ll
|
|
|
avx512-pmovxrm.ll
|
|
|
avx512-regcall-Mask.ll
|
[X86] Regcall - Adding support for mask types
|
2016-12-11 14:10:52 +00:00 |
avx512-regcall-NoMask.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-round.ll
|
|
|
avx512-scalar.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-scalarIntrinsics.ll
|
|
|
avx512-select.ll
|
[X86][AVX512] Fix PR31515 - Do not flip vselect condition if it's not a vXi1 mask
|
2017-01-12 06:49:03 +00:00 |
avx512-shift.ll
|
|
|
avx512-skx-insert-subvec.ll
|
[AVX-512] Teach shuffle lowering to use vinsert instructions for shuffles corresponding to 256-bit subvector inserts.
|
2017-01-03 07:00:40 +00:00 |
avx512-trunc.ll
|
X86 CodeGen: Optimized pattern for truncate with unsigned saturation.
|
2017-01-11 12:59:32 +00:00 |
avx512-unsafe-fp-math.ll
|
|
|
avx512-vbroadcast.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-vbroadcasti128.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512-vbroadcasti256.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-vec-cmp.ll
|
[AVX-512] Change another pattern that was using BLENDM to use masked moves. A future patch will conver it back to BLENDM if its beneficial to register allocation.
|
2017-01-09 04:19:34 +00:00 |
avx512-vpermv3-commute.ll
|
[AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to/from VPERMI2(B/W/D/Q/PS/PD).
|
2016-11-22 04:57:34 +00:00 |
avx512-vpternlog-commute.ll
|
|
|
avx512-vselect-crash.ll
|
|
|
avx512bw-arith.ll
|
|
|
avx512bw-intrinsics-fast-isel.ll
|
|
|
avx512bw-intrinsics-upgrade.ll
|
[X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able to constant fold it in InstCombineCalls like we do for 128/256-bit.
|
2016-12-10 23:09:43 +00:00 |
avx512bw-intrinsics.ll
|
Added a template for building target specific memory node in DAG.
|
2016-12-21 10:43:36 +00:00 |
avx512bw-mask-op.ll
|
|
|
avx512bw-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bw-vec-cmp.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bwvl-arith.ll
|
|
|
avx512bwvl-intrinsics-fast-isel.ll
|
|
|
avx512bwvl-intrinsics-upgrade.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512bwvl-intrinsics.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512bwvl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bwvl-vec-cmp.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512cd-intrinsics.ll
|
|
|
avx512cdvl-intrinsics.ll
|
|
|
avx512dq-intrinsics-upgrade.ll
|
[AVX-512] Add support for detecting 512-bit shuffles that contain a 128-bit subvector insertion from the lowest subvector of one of the sources.
|
2017-01-04 07:32:03 +00:00 |
avx512dq-intrinsics.ll
|
[AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors. There are some codegen problems here that I'll try to fix in future commits.
|
2017-01-03 05:45:57 +00:00 |
avx512dq-mask-op.ll
|
|
|
avx512dqvl-intrinsics-upgrade.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512dqvl-intrinsics.ll
|
[AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors. There are some codegen problems here that I'll try to fix in future commits.
|
2017-01-03 05:45:57 +00:00 |
avx512er-intrinsics.ll
|
|
|
avx512ifma-intrinsics.ll
|
|
|
avx512ifmavl-intrinsics.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vbmi-intrinsics.ll
|
[AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to/from VPERMI2(B/W/D/Q/PS/PD).
|
2016-11-22 04:57:34 +00:00 |
avx512vbmivl-intrinsics.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-arith.ll
|
|
|
avx512vl-intrinsics-fast-isel.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512vl-intrinsics-upgrade.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512vl-intrinsics.ll
|
[AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors. There are some codegen problems here that I'll try to fix in future commits.
|
2017-01-03 05:45:57 +00:00 |
avx512vl-logic.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512vl-nontemporal.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-vbroadcast.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-vec-cmp.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx-arith.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
avx-basic.ll
|
|
|
avx-bitcast.ll
|
|
|
avx-brcond.ll
|
|
|
avx-cast.ll
|
|
|
avx-cmp.ll
|
|
|
avx-cvt-2.ll
|
|
|
avx-cvt.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
avx-fp2int.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
avx-insertelt.ll
|
|
|
avx-intel-ocl.ll
|
|
|
avx-intrinsics-fast-isel.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
avx-intrinsics-x86_64.ll
|
|
|
avx-intrinsics-x86-upgrade.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
avx-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx-isa-check.ll
|
|
|
avx-load-store.ll
|
|
|
avx-logic.ll
|
|
|
avx-minmax.ll
|
|
|
avx-select.ll
|
|
|
avx-shift.ll
|
|
|
avx-shuffle-x86_32.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
avx-splat.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
avx-trunc.ll
|
X86 CodeGen: Optimized pattern for truncate with unsigned saturation.
|
2017-01-11 12:59:32 +00:00 |
avx-unpack.ll
|
|
|
avx-varargs-x86_64.ll
|
|
|
avx-vbroadcast.ll
|
|
|
avx-vbroadcastf128.ll
|
|
|
avx-vextractf128.ll
|
|
|
avx-vinsertf128.ll
|
|
|
avx-vperm2x128.ll
|
[DAGCombiner] (REAPPLIED) Add vector demanded elements support to computeKnownBits
|
2016-10-29 11:29:39 +00:00 |
avx-vzeroupper.ll
|
|
|
avx-win64-args.ll
|
|
|
avx-win64.ll
|
|
|
avx.ll
|
|
|
barrier-sse.ll
|
|
|
barrier.ll
|
|
|
base-pointer-and-cmpxchg.ll
|
|
|
basic-promote-integers.ll
|
|
|
bc-extract.ll
|
|
|
bigstructret2.ll
|
|
|
bigstructret.ll
|
|
|
bit-piece-comment.ll
|
[DIExpression] Introduce a dedicated DW_OP_LLVM_fragment operation
|
2016-12-05 18:04:47 +00:00 |
bit-test-shift.ll
|
|
|
bitcast2.ll
|
|
|
bitcast-i256.ll
|
|
|
bitcast-int-to-vector.ll
|
|
|
bitcast-mmx.ll
|
|
|
bitcast.ll
|
|
|
bitreverse.ll
|
|
|
block-placement.ll
|
|
|
block-placement.mir
|
Add missing -mtriple to MIR test case
|
2016-12-15 07:13:50 +00:00 |
bmi-intrinsics-fast-isel-x86_64.ll
|
|
|
bmi-intrinsics-fast-isel.ll
|
|
|
bmi.ll
|
|
|
bool-simplify.ll
|
|
|
bool-zext.ll
|
|
|
br-fold.ll
|
|
|
branchfolding-catchpads.ll
|
Avoid infinite loops in branch folding
|
2016-12-12 23:05:38 +00:00 |
branchfolding-landingpads.ll
|
|
|
branchfolding-undef.mir
|
|
|
brcond.ll
|
|
|
break-anti-dependencies.ll
|
|
|
break-false-dep.ll
|
|
|
broadcast-elm-cross-splat-vec.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
bss_pagealigned.ll
|
|
|
bswap-inline-asm.ll
|
|
|
bswap-vector.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
bswap.ll
|
|
|
bt.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
btq.ll
|
|
|
buildvec-insertvec.ll
|
|
|
bypass-slow-division-32.ll
|
[X86] Modify BypassSlowDivision tests to match their new names (NFC)
|
2017-01-12 19:48:01 +00:00 |
bypass-slow-division-64.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
bypass-slow-division-tune.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
byval2.ll
|
|
|
byval3.ll
|
|
|
byval4.ll
|
|
|
byval5.ll
|
|
|
byval6.ll
|
|
|
byval7.ll
|
|
|
byval-align.ll
|
|
|
byval-callee-cleanup.ll
|
|
|
byval.ll
|
|
|
cache-intrinsic.ll
|
|
|
call-imm.ll
|
|
|
call-push.ll
|
|
|
cas.ll
|
|
|
catch.ll
|
|
|
catchpad-dynamic-alloca.ll
|
|
|
catchpad-lifetime.ll
|
|
|
catchpad-realign-savexmm.ll
|
|
|
catchpad-regmask.ll
|
|
|
catchpad-reuse.ll
|
|
|
catchpad-weight.ll
|
|
|
catchret-empty-fallthrough.ll
|
|
|
catchret-fallthrough.ll
|
|
|
catchret-regmask.ll
|
|
|
cfi.ll
|
|
|
cfstring.ll
|
|
|
chain_order.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
change-compare-stride-1.ll
|
|
|
change-compare-stride-trickiness-0.ll
|
|
|
change-compare-stride-trickiness-1.ll
|
|
|
change-compare-stride-trickiness-2.ll
|
|
|
change-unsafe-fp-math.ll
|
[TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.
|
2017-01-10 23:43:04 +00:00 |
cleanuppad-inalloca.ll
|
|
|
cleanuppad-large-codemodel.ll
|
|
|
cleanuppad-realign.ll
|
|
|
clear_upper_vector_element_bits.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
clobber-fi0.ll
|
|
|
clz.ll
|
|
|
cmov-double.ll
|
|
|
cmov-fp.ll
|
|
|
cmov-into-branch.ll
|
|
|
cmov.ll
|
[x86] fix usage of stale operands when lowering select
|
2017-01-08 15:53:40 +00:00 |
cmovcmov.ll
|
|
|
cmp-fast-isel.ll
|
|
|
cmp.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
cmpxchg8b_alloca_regalloc_handling.ll
|
[x86] Fixing PR28755 by precomputing the address used in CMPXCHG8B
|
2016-11-24 13:23:35 +00:00 |
cmpxchg16b.ll
|
|
|
cmpxchg-clobber-flags.ll
|
|
|
cmpxchg-i1.ll
|
|
|
cmpxchg-i128-i1.ll
|
|
|
coal-sections.ll
|
|
|
coalesce_commute_movsd.ll
|
|
|
coalesce_commute_subreg.ll
|
|
|
coalesce-esp.ll
|
|
|
coalesce-implicitdef.ll
|
|
|
coalescer-commute1.ll
|
|
|
coalescer-commute2.ll
|
|
|
coalescer-commute3.ll
|
|
|
coalescer-commute4.ll
|
|
|
coalescer-commute5.ll
|
|
|
coalescer-cross.ll
|
|
|
coalescer-dce2.ll
|
|
|
coalescer-dce.ll
|
|
|
coalescer-identity.ll
|
|
|
coalescer-remat.ll
|
|
|
coalescer-subreg.ll
|
|
|
coalescer-win64.ll
|
|
|
code_placement_align_all.ll
|
|
|
code_placement_cold_loop_blocks.ll
|
|
|
code_placement_eh.ll
|
|
|
code_placement_ignore_succ_in_inner_loop.ll
|
|
|
code_placement_loop_rotation2.ll
|
|
|
code_placement_loop_rotation3.ll
|
|
|
code_placement_loop_rotation.ll
|
|
|
code_placement_outline_optional_branches.ll
|
|
|
code_placement.ll
|
|
|
codegen-prepare-addrmode-sext.ll
|
|
|
codegen-prepare-cast.ll
|
|
|
codegen-prepare-crash.ll
|
|
|
codegen-prepare-extload.ll
|
|
|
codegen-prepare.ll
|
|
|
codemodel.ll
|
|
|
coff-comdat2.ll
|
|
|
coff-comdat3.ll
|
|
|
coff-comdat.ll
|
|
|
coff-feat00.ll
|
|
|
coff-weak.ll
|
|
|
coldcc64.ll
|
|
|
combine-64bit-vec-binop.ll
|
[x86] auto-generate checks; NFC
|
2016-11-15 18:44:53 +00:00 |
combine-add.ll
|
|
|
combine-and.ll
|
[DAG] x & x --> x
|
2016-10-30 18:13:30 +00:00 |
combine-avx2-intrinsics.ll
|
|
|
combine-avx-intrinsics.ll
|
|
|
combine-fcopysign.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
combine-lds.ll
|
|
|
combine-mul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
combine-multiplies.ll
|
|
|
combine-or.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sdiv.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-sext-in-reg.ll
|
[DAGCombine] Add (sext_in_reg (zext x)) -> (sext x) combine
|
2016-12-06 19:09:37 +00:00 |
combine-shl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sra.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-srem.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-srl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sse41-intrinsics.ll
|
|
|
combine-sub.ll
|
|
|
combine-testm-and.ll
|
|
|
combine-udiv.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-urem.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combiner-aa-0.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
combiner-aa-1.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
commute-blend-avx2.ll
|
|
|
commute-blend-sse41.ll
|
|
|
commute-clmul.ll
|
|
|
commute-fcmp.ll
|
|
|
commute-intrinsic.ll
|
|
|
commute-two-addr.ll
|
|
|
commute-xop.ll
|
|
|
commuted-blend-mask.ll
|
|
|
compact-unwind.ll
|
|
|
compare_folding.ll
|
|
|
compare-add.ll
|
|
|
compare-global.ll
|
Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86.
|
2016-11-09 23:53:43 +00:00 |
compare-inf.ll
|
|
|
compiler_used.ll
|
|
|
complex-asm.ll
|
|
|
complex-fca.ll
|
|
|
compress_expand.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
computeKnownBits_urem.ll
|
|
|
conditional-indecrement.ll
|
|
|
conditional-tailcall.ll
|
|
|
const-base-addr.ll
|
|
|
constant-combines.ll
|
|
|
constant-hoisting-and.ll
|
|
|
constant-hoisting-cmp.ll
|
|
|
constant-hoisting-optnone.ll
|
|
|
constant-hoisting-shift-immediate.ll
|
|
|
constant-pool-remat-0.ll
|
|
|
constant-pool-sharing.ll
|
|
|
constpool.ll
|
|
|
constructor.ll
|
|
|
convert-2-addr-3-addr-inc64.ll
|
|
|
copy-eflags.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
copy-propagation.ll
|
|
|
copysign-constant-magnitude.ll
|
|
|
cpus.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
crash-lre-eliminate-dead-def.ll
|
|
|
crash-nosse.ll
|
|
|
crash-O0.ll
|
|
|
crash.ll
|
|
|
critical-anti-dep-breaker.ll
|
|
|
critical-edge-split-2.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
cse-add-with-overflow.ll
|
|
|
cstring.ll
|
|
|
ctpop-combine.ll
|
|
|
cvt16.ll
|
|
|
cvtv2f32.ll
|
|
|
cxx_tlscc64.ll
|
|
|
dag-fmf-cse.ll
|
|
|
dag-merge-fast-accesses.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
dag-optnone.ll
|
|
|
dag-rauw-cse.ll
|
|
|
dagcombine-and-setcc.ll
|
|
|
dagcombine-buildvector.ll
|
|
|
dagcombine-cse.ll
|
|
|
dagcombine-shifts.ll
|
|
|
dagcombine-unsafe-math.ll
|
|
|
darwin-bzero.ll
|
|
|
darwin-no-dead-strip.ll
|
|
|
darwin-quote.ll
|
|
|
darwin-tls.ll
|
|
|
dbg-changes-codegen-branch-folding.ll
|
|
|
dbg-changes-codegen.ll
|
|
|
dbg-combine.ll
|
|
|
DbgValueOtherTargets.test
|
|
|
debugloc-argsize.ll
|
|
|
deopt-bundles.ll
|
|
|
deopt-intrinsic-cconv.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
deopt-intrinsic.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
disable-tail-calls.ll
|
|
|
discontiguous-loops.ll
|
|
|
div8.ll
|
|
|
divide-by-constant.ll
|
[X86] Add integer division test for PR23590
|
2016-11-16 14:54:34 +00:00 |
divide-windows-itanium.ll
|
|
|
divrem8_ext.ll
|
[X86] Regenerated integer divide tests to test on 32 and 64 bit targets
|
2016-11-16 14:12:11 +00:00 |
divrem.ll
|
[X86] Regenerated integer divide tests to test on 32 and 64 bit targets
|
2016-11-16 14:12:11 +00:00 |
dllexport-x86_64.ll
|
|
|
dllexport.ll
|
|
|
dllimport-x86_64.ll
|
|
|
dllimport.ll
|
|
|
dollar-name.ll
|
|
|
dont-trunc-store-double-to-float.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
dwarf-comp-dir.ll
|
|
|
dwarf-eh-prepare.ll
|
|
|
dyn_alloca_aligned.ll
|
|
|
dyn-stackalloc.ll
|
|
|
dynamic-alloca-in-entry.ll
|
|
|
dynamic-alloca-lifetime.ll
|
|
|
dynamic-allocas-VLAs.ll
|
|
|
early-cfi-sections.ll
|
Emit .cfi_sections before the first .cfi_startproc
|
2017-01-02 18:05:27 +00:00 |
early-ifcvt-crash.ll
|
|
|
early-ifcvt.ll
|
|
|
eflags-copy-expansion.mir
|
|
|
eh_frame.ll
|
|
|
eh-label.ll
|
|
|
eh-nolandingpads.ll
|
|
|
eh-null-personality.ll
|
|
|
element-wise-atomic-memory-intrinsics.ll
|
Introduce element-wise atomic memcpy intrinsic
|
2016-12-29 14:31:07 +00:00 |
elf-comdat2.ll
|
|
|
elf-comdat.ll
|
|
|
emit-big-cst.ll
|
|
|
empty-functions.ll
|
|
|
empty-struct-return-type.ll
|
|
|
emutls_generic.ll
|
|
|
emutls-pic.ll
|
|
|
emutls-pie.ll
|
|
|
emutls.ll
|
|
|
epilogue.ll
|
|
|
equiv_with_fndef.ll
|
|
|
equiv_with_vardef.ll
|
|
|
evex-to-vex-compress.mir
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
exception-label.ll
|
|
|
exedeps-movq.ll
|
|
|
exedepsfix-broadcast.ll
|
[X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
|
2016-12-07 12:10:49 +00:00 |
expand-opaque-const.ll
|
|
|
expand-vr64-gr64-copy.mir
|
|
|
extend.ll
|
|
|
extended-fma-contraction.ll
|
|
|
extern_weak.ll
|
|
|
extmul64.ll
|
|
|
extmul128.ll
|
|
|
extract-combine.ll
|
|
|
extract-concat.ll
|
|
|
extract-extract.ll
|
|
|
extract-store.ll
|
|
|
extractelement-from-arg.ll
|
|
|
extractelement-index.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
extractelement-legalization-cycle.ll
|
|
|
extractelement-legalization-store-ordering.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
extractelement-load.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
extractelement-shuffle.ll
|
|
|
extractps.ll
|
|
|
f16c-intrinsics-fast-isel.ll
|
|
|
f16c-intrinsics.ll
|
|
|
fabs.ll
|
|
|
fadd-combines.ll
|
|
|
fast-cc-callee-pops.ll
|
|
|
fast-cc-merge-stack-adj.ll
|
|
|
fast-cc-pass-in-regs.ll
|
|
|
fast-isel-agg-constant.ll
|
|
|
fast-isel-args-fail2.ll
|
|
|
fast-isel-args-fail.ll
|
|
|
fast-isel-args.ll
|
|
|
fast-isel-atomic.ll
|
|
|
fast-isel-avoid-unnecessary-pic-base.ll
|
|
|
fast-isel-bail.ll
|
|
|
fast-isel-bc.ll
|
|
|
fast-isel-bitcasts-avx512.ll
|
[AVX-512] Teach fast isel to handle 512-bit vector bitcasts.
|
2016-12-05 05:50:51 +00:00 |
fast-isel-bitcasts-avx.ll
|
|
|
fast-isel-bitcasts.ll
|
|
|
fast-isel-branch_weights.ll
|
|
|
fast-isel-call-bool.ll
|
|
|
fast-isel-call.ll
|
|
|
fast-isel-cmp-branch2.ll
|
|
|
fast-isel-cmp-branch3.ll
|
|
|
fast-isel-cmp-branch.ll
|
|
|
fast-isel-cmp.ll
|
|
|
fast-isel-constant.ll
|
|
|
fast-isel-constpool.ll
|
|
|
fast-isel-constrain-store-indexreg.ll
|
|
|
fast-isel-deadcode.ll
|
|
|
fast-isel-divrem-x86-64.ll
|
|
|
fast-isel-divrem.ll
|
|
|
fast-isel-double-half-convertion.ll
|
|
|
fast-isel-emutls.ll
|
|
|
fast-isel-expect.ll
|
|
|
fast-isel-extract.ll
|
|
|
fast-isel-float-half-convertion.ll
|
|
|
fast-isel-fneg.ll
|
|
|
fast-isel-fold-mem.ll
|
|
|
fast-isel-fptrunc-fpext.ll
|
|
|
fast-isel-gep.ll
|
|
|
fast-isel-gv.ll
|
|
|
fast-isel-i1.ll
|
|
|
fast-isel-int-float-conversion.ll
|
|
|
fast-isel-load-i1.ll
|
|
|
fast-isel-mem.ll
|
|
|
fast-isel-movsbl-indexreg.ll
|
|
|
fast-isel-nontemporal.ll
|
|
|
fast-isel-ret-ext.ll
|
|
|
fast-isel-select-cmov2.ll
|
|
|
fast-isel-select-cmov.ll
|
|
|
fast-isel-select-cmp.ll
|
|
|
fast-isel-select-pseudo-cmov.ll
|
|
|
fast-isel-select-sse.ll
|
[AVX-512] Teach fast isel to use masked compare and movss for handling scalar cmp and select sequence when AVX-512 is enabled. This matches the behavior of normal isel.
|
2016-12-05 04:51:31 +00:00 |
fast-isel-select.ll
|
|
|
fast-isel-sext.ll
|
|
|
fast-isel-sse12-fptoint.ll
|
|
|
fast-isel-stackcheck.ll
|
|
|
fast-isel-store.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
fast-isel-tailcall.ll
|
|
|
fast-isel-tls.ll
|
|
|
fast-isel-trunc-kill-subreg.ll
|
|
|
fast-isel-vecload.ll
|
|
|
fast-isel-x32.ll
|
|
|
fast-isel-x86-64.ll
|
|
|
fast-isel-x86.ll
|
|
|
fast-isel.ll
|
|
|
fastcall-correct-mangling.ll
|
|
|
fastcc3struct.ll
|
|
|
fastcc-2.ll
|
|
|
fastcc-byval.ll
|
|
|
fastcc-sret.ll
|
|
|
fastcc.ll
|
|
|
fastisel-gep-promote-before-add.ll
|
|
|
fastmath-float-half-conversion.ll
|
|
|
fcmove.ll
|
|
|
fdiv-combine.ll
|
|
|
fdiv.ll
|
|
|
field-extract-use-trunc.ll
|
|
|
fildll.ll
|
|
|
fixup-bw-copy.ll
|
|
|
fixup-bw-copy.mir
|
|
|
fixup-bw-inst.ll
|
|
|
fixup-lea.ll
|
|
|
float-asmprint.ll
|
|
|
float-conv-elim.ll
|
|
|
floor-soft-float.ll
|
|
|
fltused_function_pointer.ll
|
|
|
fltused.ll
|
|
|
fma4-intrinsics-x86_64-folded-load.ll
|
|
|
fma_patterns_wide.ll
|
X86: Add checks for fma_patterns[_wide].ll with -enable-no-infs-fp-math
|
2016-12-08 14:08:08 +00:00 |
fma_patterns.ll
|
X86: Add checks for fma_patterns[_wide].ll with -enable-no-infs-fp-math
|
2016-12-08 14:08:08 +00:00 |
fma-commute-x86.ll
|
|
|
fma-do-not-commute.ll
|
|
|
fma-fneg-combine.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
fma-intrinsics-phi-213-to-231.ll
|
|
|
fma-intrinsics-x86.ll
|
|
|
fma-phi-213-to-231.ll
|
|
|
fma-scalar-memfold.ll
|
[X86][FMA4] Add load folding support for FMA4 scalar intrinsic instructions.
|
2016-11-27 21:37:00 +00:00 |
fma.ll
|
|
|
fmaddsub-combine.ll
|
X86-specific path: Implemented the fusing of MUL+ADDSUB to FMADDSUB.
|
2017-01-09 20:26:17 +00:00 |
fmaxnum.ll
|
|
|
fminnum.ll
|
|
|
fmul-combines.ll
|
|
|
fmul-zero.ll
|
|
|
fnabs.ll
|
|
|
fold-add.ll
|
|
|
fold-and-shift.ll
|
|
|
fold-call-2.ll
|
|
|
fold-call-3.ll
|
|
|
fold-call-oper.ll
|
|
|
fold-call.ll
|
|
|
fold-imm.ll
|
|
|
fold-load-binops.ll
|
|
|
fold-load-unops.ll
|
|
|
fold-load-vec.ll
|
|
|
fold-load.ll
|
|
|
fold-mul-lohi.ll
|
|
|
fold-pcmpeqd-1.ll
|
|
|
fold-pcmpeqd-2.ll
|
|
|
fold-push.ll
|
|
|
fold-sext-trunc.ll
|
|
|
fold-tied-op.ll
|
|
|
fold-vector-bv-crash.ll
|
|
|
fold-vector-sext-crash2.ll
|
|
|
fold-vector-sext-crash.ll
|
|
|
fold-vector-sext-zext.ll
|
|
|
fold-vector-shl-crash.ll
|
|
|
fold-vector-shuffle-crash.ll
|
|
|
fold-vector-trunc-sitofp.ll
|
|
|
fold-vex.ll
|
|
|
fold-xmm-zero.ll
|
|
|
fold-zext-trunc.ll
|
|
|
fops-windows-itanium.ll
|
|
|
force-align-stack-alloca.ll
|
|
|
force-align-stack.ll
|
|
|
fp2sint.ll
|
|
|
fp128-calling-conv.ll
|
|
|
fp128-cast.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
fp128-compare.ll
|
|
|
fp128-g.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
fp128-i128.ll
|
|
|
fp128-libcalls.ll
|
|
|
fp128-load.ll
|
|
|
fp128-select.ll
|
|
|
fp128-store.ll
|
|
|
fp_constant_op.ll
|
|
|
fp_load_cast_fold.ll
|
|
|
fp_load_fold.ll
|
|
|
fp-double-rounding.ll
|
|
|
fp-elim-and-no-fp-elim.ll
|
|
|
fp-elim.ll
|
|
|
fp-fast.ll
|
|
|
fp-immediate-shorten.ll
|
|
|
fp-in-intregs.ll
|
|
|
fp-load-trunc.ll
|
|
|
fp-logic-replace.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
fp-logic.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
fp-select-cmp-and.ll
|
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes
|
2016-11-16 17:42:40 +00:00 |
fp-stack-2results.ll
|
|
|
fp-stack-compare-cmov.ll
|
|
|
fp-stack-compare.ll
|
|
|
fp-stack-direct-ret.ll
|
|
|
fp-stack-O0-crash.ll
|
|
|
fp-stack-O0.ll
|
|
|
fp-stack-ret-conv.ll
|
|
|
fp-stack-ret-store.ll
|
|
|
fp-stack-ret.ll
|
|
|
fp-stack-retcopy.ll
|
|
|
fp-stack-set-st1.ll
|
|
|
fp-stack.ll
|
|
|
fp-trunc.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
fp-une-cmp.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
fpcmp-soft-fp.ll
|
|
|
fpstack-debuginstr-kill.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
frame-base.ll
|
|
|
frame-lowering-debug-intrinsic-2.ll
|
[framelowering] Skip dbg values when getting next/previous instruction.
|
2017-01-04 12:08:35 +00:00 |
frame-lowering-debug-intrinsic.ll
|
[framelowering] Skip dbg values when getting next/previous instruction.
|
2017-01-04 12:08:35 +00:00 |
frame-order.ll
|
|
|
frameaddr.ll
|
|
|
frameregister.ll
|
|
|
frem-msvc32.ll
|
|
|
fsgsbase.ll
|
|
|
fsxor-alignment.ll
|
|
|
full-lsr.ll
|
|
|
funclet-layout.ll
|
|
|
function-alias.ll
|
|
|
function-subtarget-features-2.ll
|
|
|
function-subtarget-features.ll
|
|
|
ga-offset2.ll
|
|
|
ga-offset.ll
|
|
|
gather-addresses.ll
|
|
|
gcc_except_table_functions.ll
|
|
|
gcc_except_table.ll
|
|
|
gep-expanded-vector.ll
|
|
|
getelementptr.ll
|
|
|
ghc-cc64.ll
|
|
|
ghc-cc.ll
|
|
|
global-access-pie-copyrelocs.ll
|
|
|
global-access-pie.ll
|
|
|
global-fill.ll
|
|
|
global-sections-comdat.ll
|
|
|
global-sections-tls.ll
|
|
|
global-sections.ll
|
|
|
gs-fold.ll
|
|
|
h-register-addressing-32.ll
|
|
|
h-register-addressing-64.ll
|
|
|
h-register-store.ll
|
|
|
h-registers-0.ll
|
|
|
h-registers-1.ll
|
|
|
h-registers-2.ll
|
|
|
h-registers-3.ll
|
|
|
haddsub-2.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
haddsub-undef.ll
|
|
|
haddsub.ll
|
|
|
half.ll
|
|
|
handle-move.ll
|
|
|
hhvm-cc.ll
|
|
|
hidden-vis-2.ll
|
|
|
hidden-vis-3.ll
|
|
|
hidden-vis-4.ll
|
|
|
hidden-vis-pic.ll
|
|
|
hidden-vis.ll
|
|
|
hipe-cc64.ll
|
|
|
hipe-cc.ll
|
|
|
hipe-prologue.ll
|
|
|
hoist-common.ll
|
|
|
hoist-invariant-load.ll
|
|
|
hoist-spill-lpad.ll
|
|
|
hoist-spill.ll
|
|
|
horizontal-shuffle.ll
|
[X86][SSE] Add tests demonstrating missed opportunities to combine 64-bit element unpacks with horizontal pair ops.
|
2016-11-30 11:30:33 +00:00 |
huge-stack-offset.ll
|
|
|
i1narrowfail.ll
|
|
|
i2k.ll
|
|
|
i16lshr8pat.ll
|
|
|
i64-mem-copy.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
i64-to-float.ll
|
[X86] Attempt to pre-truncate arithmetic operations if useful
|
2017-01-04 08:05:42 +00:00 |
i128-and-beyond.ll
|
|
|
i128-immediate.ll
|
|
|
i128-mul.ll
|
|
|
i128-ret.ll
|
|
|
i128-sdiv.ll
|
|
|
i256-add.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
i386-setjmp-pic.ll
|
|
|
i386-shrink-wrapping.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
i386-tlscall-fastregalloc.ll
|
|
|
i486-fence-loop.ll
|
|
|
i686-win-shrink-wrapping.ll
|
|
|
iabs.ll
|
|
|
ident-metadata.ll
|
|
|
ifunc-asm.ll
|
|
|
illegal-insert.ll
|
|
|
illegal-vector-args-return.ll
|
|
|
immediate_merging64.ll
|
|
|
immediate_merging.ll
|
|
|
implicit-null-check-negative.ll
|
|
|
implicit-null-check.ll
|
|
|
implicit-null-checks.mir
|
Make the test accept different OpCode values since it doesn't really care about the value.
|
2017-01-10 22:10:22 +00:00 |
implicit-use-spill.mir
|
[InlineSpiller] Don't call TargetInstrInfo::foldMemoryOperand with an empty list.
|
2016-12-08 00:06:51 +00:00 |
imul-lea-2.ll
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imul-lea.ll
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imul.ll
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inalloca-ctor.ll
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inalloca-invoke.ll
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inalloca-regparm.ll
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|
inalloca-stdcall.ll
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|
inalloca.ll
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inconsistent_landingpad.ll
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indirect-hidden.ll
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init-priority.ll
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inline-asm-2addr.ll
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inline-asm-avx512f-v-constraint.ll
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inline-asm-avx512vl-v-constraint-32bit.ll
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|
inline-asm-avx512vl-v-constraint.ll
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inline-asm-avx-v-constraint-32bit.ll
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inline-asm-avx-v-constraint.ll
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inline-asm-bad-constraint-n.ll
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inline-asm-duplicated-constraint.ll
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|
inline-asm-error.ll
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inline-asm-flag-clobber.ll
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inline-asm-fpstack.ll
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Updated test with -verify-machineinstrs to check for PR21931
|
2016-11-30 13:21:12 +00:00 |
inline-asm-h.ll
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inline-asm-modifier-n.ll
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inline-asm-modifier-q.ll
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inline-asm-mrv.ll
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inline-asm-out-regs.ll
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inline-asm-pic.ll
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inline-asm-ptr-cast.ll
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inline-asm-q-regs.ll
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inline-asm-R-constraint.ll
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inline-asm-sp-clobber-memcpy.ll
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inline-asm-stack-realign2.ll
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inline-asm-stack-realign3.ll
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inline-asm-stack-realign.ll
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inline-asm-tied.ll
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inline-asm-x-scalar.ll
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inline-asm.ll
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inline-sse.ll
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inlineasm-sched-bug.ll
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inreg.ll
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ins_split_regalloc.ll
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ins_subreg_coalesce-1.ll
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ins_subreg_coalesce-2.ll
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ins_subreg_coalesce-3.ll
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insert-positions.ll
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insertelement-copytoregs.ll
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insertelement-legalize.ll
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insertelement-zero.ll
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insertps-combine.ll
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insertps-from-constantpool.ll
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insertps-O0-bug.ll
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insertps-unfold-load-bug.ll
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int-intrinsic.ll
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interval-update-remat.ll
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invalid-liveness.mir
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invalid-shift-immediate.ll
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ipra-inline-asm.ll
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ipra-local-linkage.ll
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ipra-reg-alias.ll
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ipra-reg-usage.ll
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ipra-transform.ll
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isel-optnone.ll
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isel-sink2.ll
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isel-sink3.ll
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isel-sink.ll
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isint.ll
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isnan2.ll
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isnan.ll
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ispositive.ll
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jump_sign.ll
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Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
known-bits-vector.ll
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[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large element' scalar/vector to 'small element' vector.
|
2016-12-10 17:00:00 +00:00 |
known-bits.ll
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[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
label-redefinition.ll
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lakemont.ll
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large-code-model-isel.ll
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large-constants.ll
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large-gep-chain.ll
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large-gep-scale.ll
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large-global.ll
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late-address-taken.ll
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ldzero.ll
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lea-2.ll
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lea-3.ll
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lea-4.ll
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lea-5.ll
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lea-opt-memop-check-1.ll
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lea-opt-memop-check-2.ll
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lea-opt.ll
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lea-recursion.ll
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lea.ll
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leaf-fp-elim.ll
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legalize-fmp-oeq-vector-select.ll
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legalize-libcalls.ll
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legalize-shift-64.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
legalize-shl-vec.ll
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legalize-sub-zero-2.ll
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legalize-sub-zero.ll
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legalizedag_vec.ll
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lfence.ll
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libcall-sret.ll
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licm-dominance.ll
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licm-nested.ll
|
Revert r286999 which caused buildbot test failures. Some testcases need to be made target specific.
|
2016-11-15 19:42:05 +00:00 |
licm-regpressure.ll
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licm-symbol.ll
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limited-prec.ll
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lit.local.cfg
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live-out-reg-info.ll
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live-range-nosubreg.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
liveness-local-regalloc.ll
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llc-override-mcpu-mattr.ll
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load-slice.ll
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loc-remat.ll
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local_stack_symbol_ordering.ll
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localescape.ll
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|
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log2_not_readnone.ll
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|
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logical-load-fold.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
long-setcc.ll
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longlong-deadload.ll
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loop-blocks.ll
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loop-hoist.ll
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loop-search.ll
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loop-strength-reduce2.ll
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loop-strength-reduce4.ll
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loop-strength-reduce5.ll
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loop-strength-reduce6.ll
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loop-strength-reduce7.ll
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loop-strength-reduce8.ll
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loop-strength-reduce-2.ll
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loop-strength-reduce-3.ll
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loop-strength-reduce-crash.ll
|
[LSR] Tweak loop-strength-reduce-crash test. Test-only change.
|
2016-11-10 22:37:13 +00:00 |
loop-strength-reduce.ll
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|
|
lower-bitcast.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
lower-vec-shift-2.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
lower-vec-shift.ll
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|
|
lower-vec-shuffle-bug.ll
|
|
|
lsr-delayed-fold.ll
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|
lsr-i386.ll
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|
lsr-interesting-step.ll
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lsr-loop-exit-cond.ll
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lsr-negative-stride.ll
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lsr-nonaffine.ll
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lsr-normalization.ll
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lsr-overflow.ll
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lsr-quadratic-expand.ll
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lsr-redundant-addressing.ll
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lsr-reuse-trunc.ll
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lsr-reuse.ll
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lsr-sort.ll
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lsr-static-addr.ll
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lsr-wrap.ll
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|
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lzcnt-tzcnt.ll
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lzcnt-zext-cmp.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
lzcnt.ll
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|
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machine-combiner-int-vec.ll
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machine-combiner-int.ll
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machine-combiner.ll
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|
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machine-copy-prop.mir
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|
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machine-cp.ll
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machine-cse.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
machine-sink-and-implicit-null-checks.ll
|
|
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machine-sink.ll
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machine-trace-metrics-crash.ll
|
|
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MachineBranchProb.ll
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MachineSink-CritEdge.ll
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MachineSink-DbgValue.ll
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MachineSink-eflags.ll
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MachineSink-PHIUse.ll
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MachineSink-SubReg.ll
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macho-comdat.ll
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|
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mask-negated-bool.ll
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masked_gather_scatter.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
masked_memop.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
masked-iv-safe.ll
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masked-iv-unsafe.ll
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maskmovdqu.ll
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materialize.ll
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mature-mc-support.ll
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mbp-false-cfg-break.ll
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mcinst-avx-lowering.ll
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mcinst-lowering.ll
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mcu-abi.ll
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|
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mem-intrin-base-reg.ll
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|
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mem-promote-integers.ll
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|
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membarrier.ll
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|
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memcmp.ll
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|
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memcpy-2.ll
|
|
|
memcpy-from-string.ll
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|
|
memcpy.ll
|
|
|
mempcpy.ll
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|
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memset64-on-x86-32.ll
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|
|
memset-2.ll
|
|
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memset-3.ll
|
|
|
memset-nonzero.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
memset-sse-stack-realignment.ll
|
|
|
memset.ll
|
|
|
merge_store.ll
|
|
|
merge-consecutive-loads-128.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
merge-consecutive-loads-256.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
merge-consecutive-loads-512.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
merge-consecutive-stores-i1.ll
|
|
|
merge-sp-update-lea.ll
|
|
|
merge-store-partially-alias-loads.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
MergeConsecutiveStores.ll
|
The patch fixes (base, index, offset) match.
|
2017-01-04 21:43:39 +00:00 |
mfence.ll
|
|
|
mingw-alloca.ll
|
|
|
misaligned-memset.ll
|
|
|
misched-aa-colored.ll
|
|
|
misched-aa-mmos.ll
|
|
|
misched-balance.ll
|
|
|
misched-code-difference-with-debug.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
misched-copy.ll
|
|
|
misched-crash.ll
|
|
|
misched-fusion.ll
|
|
|
misched-ilp.ll
|
|
|
misched-matmul.ll
|
|
|
misched-matrix.ll
|
|
|
misched-new.ll
|
|
|
mmx-arg-passing-x86-64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
mmx-arg-passing.ll
|
|
|
mmx-arith.ll
|
|
|
mmx-bitcast-fold.ll
|
|
|
mmx-bitcast.ll
|
|
|
mmx-coalescing.ll
|
|
|
mmx-copy-gprs.ll
|
|
|
mmx-fold-load.ll
|
|
|
mmx-intrinsics.ll
|
|
|
mmx-only.ll
|
|
|
mod128.ll
|
|
|
movbe.ll
|
|
|
movfs.ll
|
|
|
movgs.ll
|
|
|
movmsk.ll
|
|
|
movntdq-no-avx.ll
|
|
|
movpc32-check.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
movtopush64.ll
|
|
|
movtopush.ll
|
|
|
ms-inline-asm.ll
|
Recognize ${:uid} escapes in intel syntax inline asm
|
2016-11-29 00:29:27 +00:00 |
mul64.ll
|
|
|
mul128_sext_loop.ll
|
|
|
mul128.ll
|
|
|
mul-i256.ll
|
Integer legalization: fix MUL expansion
|
2016-11-15 18:29:24 +00:00 |
mul-i512.ll
|
[RegAllocGreedy] Record missed hint for late recoloring.
|
2016-11-16 01:07:12 +00:00 |
mul-i1024.ll
|
[RegAllocGreedy] Record missed hint for late recoloring.
|
2016-11-16 01:07:12 +00:00 |
mul-legalize.ll
|
|
|
mul-remat.ll
|
|
|
mul-shift-reassoc.ll
|
|
|
muloti.ll
|
|
|
mult-alt-generic-i686.ll
|
|
|
mult-alt-generic-x86_64.ll
|
|
|
mult-alt-x86.ll
|
|
|
multiple-loop-post-inc.ll
|
|
|
multiple-return-values-cross-block.ll
|
|
|
mulx32.ll
|
|
|
mulx64.ll
|
|
|
musttail-fastcall.ll
|
|
|
musttail-indirect.ll
|
|
|
musttail-thiscall.ll
|
|
|
musttail-varargs.ll
|
|
|
musttail.ll
|
|
|
mwaitx.ll
|
|
|
named-reg-alloc.ll
|
|
|
named-reg-notareg.ll
|
|
|
nancvt.ll
|
|
|
narrow_op-1.ll
|
|
|
narrow-shl-cst.ll
|
|
|
narrow-shl-load.ll
|
|
|
neg_cmp.ll
|
|
|
neg_fp.ll
|
|
|
neg-shl-add.ll
|
|
|
negate-add-zero.ll
|
|
|
negate-i1.ll
|
|
|
negate-shift.ll
|
|
|
negate.ll
|
|
|
negative_zero.ll
|
|
|
negative-offset.ll
|
|
|
negative-sin.ll
|
|
|
negative-stride-fptosi-user.ll
|
|
|
negative-subscript.ll
|
|
|
new-remat.ll
|
|
|
newline-and-quote.ll
|
|
|
no-and8ri8.ll
|
|
|
no-cmov.ll
|
|
|
no-prolog-kill.ll
|
|
|
no-sse2-avg.ll
|
|
|
nobt.ll
|
|
|
nocx16.ll
|
|
|
non-lazy-bind.ll
|
|
|
non-unique-sections.ll
|
|
|
nonconst-static-ev.ll
|
|
|
nonconst-static-iv.ll
|
|
|
nontemporal-2.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
nontemporal-loads.ll
|
|
|
nontemporal.ll
|
|
|
noreturn-call.ll
|
|
|
norex-subreg.ll
|
|
|
nosse-error1.ll
|
|
|
nosse-error2.ll
|
|
|
nosse-varargs.ll
|
|
|
nosse-vector.ll
|
|
|
not-and-simplify.ll
|
[TargetLowering] add special-case for demanded bits analysis of 'not'
|
2016-12-05 15:58:21 +00:00 |
note-sections.ll
|
|
|
null-streamer.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
objc-gc-module-flags.ll
|
|
|
object-size.ll
|
|
|
oddshuffles.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
opaque-constant-asm.ll
|
|
|
opt-ext-uses.ll
|
|
|
opt-shuff-tstore.ll
|
|
|
optimize-max-0.ll
|
|
|
optimize-max-1.ll
|
|
|
optimize-max-2.ll
|
|
|
optimize-max-3.ll
|
|
|
or-address.ll
|
|
|
or-branch.ll
|
|
|
or-lea.ll
|
|
|
osx-private-labels.ll
|
|
|
overlap-shift.ll
|
|
|
packed_struct.ll
|
|
|
packss.ll
|
[SelectionDAG] Add ComputeNumSignBits support for CONCAT_VECTORS opcode
|
2016-11-21 14:36:19 +00:00 |
palignr.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
partial-fold32.ll
|
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
|
2016-11-23 18:33:49 +00:00 |
partial-fold64.ll
|
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
|
2016-11-23 18:33:49 +00:00 |
pass-three.ll
|
|
|
patchable-prologue.ll
|
|
|
patchpoint-invoke.ll
|
|
|
patchpoint-verifiable.mir
|
|
|
patchpoint-webkit_jscc.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
patchpoint.ll
|
|
|
peep-setb.ll
|
|
|
peep-test-0.ll
|
|
|
peep-test-1.ll
|
|
|
peep-test-2.ll
|
|
|
peep-test-3.ll
|
|
|
peep-test-4.ll
|
|
|
peephole-cvt-sse.ll
|
|
|
peephole-fold-movsd.ll
|
|
|
peephole-multiple-folds.ll
|
|
|
peephole-na-phys-copy-folding.ll
|
|
|
peephole.mir
|
PeepholeOptimizer: Do not replace SubregToReg(bitcast like)
|
2017-01-09 21:38:17 +00:00 |
personality_size.ll
|
|
|
personality.ll
|
|
|
phaddsub.ll
|
|
|
phi-bit-propagation.ll
|
|
|
phi-immediate-factoring.ll
|
[CodeGenPrep] Skip merging empty case blocks
|
2016-12-16 20:38:39 +00:00 |
phielim-split.ll
|
|
|
phys_subreg_coalesce-2.ll
|
|
|
phys_subreg_coalesce-3.ll
|
|
|
phys_subreg_coalesce.ll
|
|
|
phys-reg-local-regalloc.ll
|
|
|
pic_jumptable.ll
|
|
|
pic-load-remat.ll
|
|
|
pic.ll
|
|
|
pie.ll
|
|
|
pku.ll
|
|
|
pmovext.ll
|
|
|
pmovsx-inreg.ll
|
|
|
pmul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
pmulld.ll
|
|
|
pointer-vector.ll
|
[X86][SSE] Regenerate vector of pointers tests
|
2016-12-13 17:22:39 +00:00 |
pop-stack-cleanup.ll
|
|
|
popcnt.ll
|
|
|
post-ra-sched.ll
|
|
|
postalloc-coalescing.ll
|
|
|
postra-licm.ll
|
|
|
powi.ll
|
|
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pr1462.ll
|
|
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pr1489.ll
|
|
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pr1505.ll
|
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pr1505b.ll
|
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pr2177.ll
|
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pr2182.ll
|
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pr2326.ll
|
|
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pr2585.ll
|
|
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pr2656.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
pr2659.ll
|
|
|
pr2849.ll
|
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pr2924.ll
|
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pr2982.ll
|
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pr3154.ll
|
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pr3216.ll
|
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pr3241.ll
|
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pr3243.ll
|
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pr3244.ll
|
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pr3250.ll
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pr3317.ll
|
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pr3366.ll
|
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pr3457.ll
|
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pr3522.ll
|
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pr5145.ll
|
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pr7882.ll
|
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pr9127.ll
|
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pr9743.ll
|
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pr10068.ll
|
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pr10475.ll
|
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pr10499.ll
|
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pr10523.ll
|
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pr10524.ll
|
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pr10525.ll
|
|
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pr10526.ll
|
|
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pr11202.ll
|
|
|
pr11334.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
pr11415.ll
|
|
|
pr11468.ll
|
|
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pr11985.ll
|
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pr11998.ll
|
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pr12312.ll
|
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pr12360.ll
|
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pr12889.ll
|
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pr13209.ll
|
|
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pr13220.ll
|
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pr13458.ll
|
|
|
pr13577.ll
|
[X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they are available. This will allow a bunch of patterns to be removed.
|
2016-12-18 07:54:23 +00:00 |
pr13859.ll
|
|
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pr13899.ll
|
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pr14088.ll
|
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pr14098.ll
|
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pr14161.ll
|
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pr14204.ll
|
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pr14314.ll
|
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pr14333.ll
|
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pr14562.ll
|
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pr15267.ll
|
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pr15296.ll
|
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pr15309.ll
|
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pr16031.ll
|
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pr16360.ll
|
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pr16807.ll
|
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pr17546.ll
|
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pr17631.ll
|
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pr17764.ll
|
|
|
pr18014.ll
|
|
|
pr18023.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
pr18054.ll
|
|
|
pr18162.ll
|
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pr18846.ll
|
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pr19049.ll
|
|
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pr20020.ll
|
|
|
pr20088.ll
|
|
|
pr21099.ll
|
|
|
pr21792.ll
|
[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large element' scalar/vector to 'small element' vector.
|
2016-12-10 17:00:00 +00:00 |
pr22019.ll
|
|
|
pr22103.ll
|
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pr22774.ll
|
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pr23103.ll
|
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pr23246.ll
|
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pr23273.ll
|
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pr23603.ll
|
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pr23664.ll
|
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pr24139.ll
|
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pr24374.ll
|
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pr24602.ll
|
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pr25828.ll
|
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pr26350.ll
|
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pr26625.ll
|
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pr26652.ll
|
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pr26757.ll
|
|
|
pr26835.ll
|
|
|
pr26870.ll
|
|
|
pr27071.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr27501.ll
|
|
|
pr27591.ll
|
|
|
pr27681.mir
|
|
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pr28173.ll
|
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pr28444.ll
|
|
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pr28472.ll
|
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pr28489.ll
|
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pr28504.ll
|
|
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pr28515.ll
|
|
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pr28560.ll
|
|
|
pr28824.ll
|
|
|
pr29010.ll
|
|
|
pr29022.ll
|
|
|
pr29112.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr29170.ll
|
|
|
pr30430.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr30511.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
pr30693.ll
|
[X86] Broadcast from memory intructions aren't unfoldable
|
2016-11-04 15:15:19 +00:00 |
pr30813.ll
|
Add triple to test so it does not fail on windows.
|
2016-10-31 11:40:14 +00:00 |
pr31143.ll
|
[X86] Fix non-intrinsic roundss/roundsd to not read the destination register
|
2016-12-05 20:57:37 +00:00 |
pr31242.ll
|
[X86] Skip over DEBUG_VALUE while looking for start of call sequence
|
2016-12-07 19:31:08 +00:00 |
pr31271.ll
|
[X86] Do not assume "ri" instructions always have an immediate operand
|
2016-12-07 19:29:18 +00:00 |
pr31323.ll
|
[SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes (REAPPLIED)
|
2016-12-09 17:53:11 +00:00 |
pre-ra-sched.ll
|
|
|
prefetch.ll
|
|
|
prefixdata.ll
|
|
|
preserve_allcc64.ll
|
|
|
preserve_mostcc64.ll
|
|
|
private-2.ll
|
|
|
private.ll
|
|
|
prolog-push-seq.ll
|
|
|
prologuedata.ll
|
|
|
promote-assert-zext.ll
|
|
|
promote-i16.ll
|
|
|
promote-trunc.ll
|
|
|
promote-vec3.ll
|
|
|
promote.ll
|
|
|
ps4-noreturn.ll
|
|
|
pseudo_cmov_lower1.ll
|
|
|
pseudo_cmov_lower2.ll
|
|
|
pseudo_cmov_lower.ll
|
|
|
pshufb-mask-comments.ll
|
[X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
|
2016-12-07 12:10:49 +00:00 |
pshufd-combine-crash.ll
|
|
|
psubus.ll
|
[SelectionDAG] ComputeNumSignBits of TRUNCATE operations
|
2016-11-22 11:29:19 +00:00 |
ptr-rotate.ll
|
|
|
ptrtoint-constexpr.ll
|
|
|
push-cfi-debug.ll
|
|
|
push-cfi-obj.ll
|
|
|
push-cfi.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
ragreedy-bug.ll
|
|
|
ragreedy-hoist-spill.ll
|
[CodeGenPrep] Skip merging empty case blocks
|
2016-12-16 20:38:39 +00:00 |
ragreedy-last-chance-recoloring.ll
|
|
|
rd-mod-wr-eflags.ll
|
|
|
rdpmc.ll
|
|
|
rdrand.ll
|
|
|
rdseed.ll
|
|
|
rdtsc.ll
|
|
|
read-fp-no-frame-pointer.ll
|
|
|
recip-fastmath2.ll
|
Extra coverage tests to demonstrate fixes in D72618 and D26855
|
2016-12-16 09:56:02 +00:00 |
recip-fastmath.ll
|
[X86][SSE] Add SSE reciprocal estimate tests
|
2016-11-21 15:28:21 +00:00 |
red-zone2.ll
|
|
|
red-zone.ll
|
|
|
reduce-trunc-shl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
regalloc-reconcile-broken-hints.ll
|
|
|
regalloc-spill-at-ehpad.ll
|
|
|
reghinting.ll
|
|
|
regpressure.ll
|
|
|
rem_crash.ll
|
|
|
rem.ll
|
|
|
remat-constant.ll
|
|
|
remat-fold-load.ll
|
|
|
remat-mov-0.ll
|
|
|
remat-phys-dead.ll
|
|
|
remat-scalar-zero.ll
|
|
|
ret-addr.ll
|
|
|
ret-i64-0.ll
|
|
|
ret-mmx.ll
|
|
|
return_zeroext_i2.ll
|
|
|
return-ext.ll
|
|
|
returned-trunc-tail-calls.ll
|
|
|
reverse_branches.ll
|
|
|
rip-rel-address.ll
|
|
|
rip-rel-lea.ll
|
|
|
rodata-relocs.ll
|
|
|
rot16.ll
|
|
|
rot32.ll
|
|
|
rot64.ll
|
|
|
rotate2.ll
|
|
|
rotate4.ll
|
|
|
rotate.ll
|
|
|
rounding-ops.ll
|
|
|
rrlist-livereg-corrutpion.ll
|
|
|
rtm.ll
|
|
|
sad.ll
|
|
|
saddo-redundant-add.ll
|
|
|
safestack_ssp.ll
|
|
|
safestack.ll
|
|
|
sandybridge-loads.ll
|
|
|
sar_fold64.ll
|
|
|
sar_fold.ll
|
|
|
scalar_sse_minmax.ll
|
|
|
scalar_widen_div.ll
|
|
|
scalar-extract.ll
|
|
|
scalar-fp-to-i64.ll
|
|
|
scalar-int-to-fp.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
scalar-min-max-fill-operand.ll
|
|
|
scalarize-bitcast.ll
|
|
|
scev-interchange.ll
|
|
|
scheduler-backtracking.ll
|
|
|
sdiv-exact.ll
|
|
|
sdiv-pow2.ll
|
|
|
segmented-stacks-dynamic.ll
|
|
|
segmented-stacks.ll
|
|
|
seh-catch-all-win32.ll
|
|
|
seh-catch-all.ll
|
|
|
seh-catchpad.ll
|
Don't emit .seh_handler directives for any cleanup funclets
|
2016-12-08 20:38:46 +00:00 |
seh-except-finally.ll
|
|
|
seh-exception-code.ll
|
|
|
seh-filter-no-personality.ll
|
|
|
seh-finally.ll
|
|
|
seh-no-invokes.ll
|
|
|
seh-safe-div-win32.ll
|
|
|
seh-safe-div.ll
|
|
|
seh-stack-realign.ll
|
|
|
select_const.ll
|
|
|
select_meta.ll
|
|
|
select-with-and-or.ll
|
|
|
select.ll
|
DAGCombiner: fix combine of trunc and select
|
2016-11-15 07:55:22 +00:00 |
selectiondag-crash.ll
|
|
|
selectiondag-cse.ll
|
|
|
setcc-combine.ll
|
|
|
setcc-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
setcc-narrowing.ll
|
|
|
setcc-sentinals.ll
|
|
|
setcc.ll
|
|
|
setjmp-spills.ll
|
|
|
setoeq.ll
|
|
|
setuge.ll
|
|
|
sext-i1.ll
|
|
|
sext-load.ll
|
|
|
sext-ret-val.ll
|
|
|
sext-setcc-self.ll
|
|
|
sext-subreg.ll
|
|
|
sext-trunc.ll
|
|
|
sfence.ll
|
|
|
sha.ll
|
|
|
shift-and.ll
|
|
|
shift-avx2-crash.ll
|
|
|
shift-bmi2.ll
|
|
|
shift-coalesce.ll
|
|
|
shift-codegen.ll
|
|
|
shift-combine-crash.ll
|
|
|
shift-combine.ll
|
|
|
shift-double-x86_64.ll
|
|
|
shift-double.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
shift-folding.ll
|
|
|
shift-i128.ll
|
|
|
shift-i256.ll
|
|
|
shift-one.ll
|
|
|
shift-pair.ll
|
|
|
shift-parts.ll
|
|
|
shift-pcmp.ll
|
[DAGCombiner] Fix infinite loop in vector mul/shl combining
|
2016-11-23 16:05:51 +00:00 |
shl_elim.ll
|
|
|
shl_undef.ll
|
|
|
shl-anyext.ll
|
|
|
shl-crash-on-legalize.ll
|
|
|
shl-i64.ll
|
|
|
shrink_vmul_sse.ll
|
|
|
shrink_vmul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
shrink-compare.ll
|
|
|
shrink-fp-const1.ll
|
|
|
shrink-fp-const2.ll
|
|
|
shrink-wrap-chkstk.ll
|
|
|
shrinkwrap-hang.ll
|
|
|
shuffle-combine-crash.ll
|
|
|
shuffle-vs-trunc-128.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
shuffle-vs-trunc-256.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
shuffle-vs-trunc-512.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
sibcall-2.ll
|
|
|
sibcall-3.ll
|
|
|
sibcall-4.ll
|
|
|
sibcall-5.ll
|
|
|
sibcall-6.ll
|
|
|
sibcall-byval.ll
|
|
|
sibcall-win64.ll
|
|
|
sibcall.ll
|
|
|
simple-zext.ll
|
|
|
sincos-opt.ll
|
|
|
sincos.ll
|
|
|
sink-blockfreq.ll
|
|
|
sink-cheap-instructions.ll
|
|
|
sink-hoist.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
sink-out-of-loop.ll
|
|
|
sjlj-baseptr.ll
|
|
|
sjlj-eh.ll
|
|
|
sjlj.ll
|
|
|
slow-incdec.ll
|
|
|
slow-pmulld.ll
|
[X86] Prefer reduced width multiplication over pmulld on Silvermont
|
2016-12-06 19:35:20 +00:00 |
slow-unaligned-mem.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
small-byval-memcpy.ll
|
|
|
smul-with-overflow.ll
|
|
|
soft-fp.ll
|
|
|
soft-sitofp.ll
|
|
|
splat-const.ll
|
|
|
splat-for-size.ll
|
|
|
split-eh-lpad-edges.ll
|
|
|
split-store.ll
|
Redo store splitting in CodeGenPrepare.
|
2016-12-22 19:44:45 +00:00 |
split-vector-bitcast.ll
|
|
|
split-vector-rem.ll
|
|
|
sqrt-fastmath-mir.ll
|
[X86] Remove scalar logical op alias instructions. Just use COPY_FROM/TO_REGCLASS and the normal packed instructions instead
|
2016-12-06 04:58:39 +00:00 |
sqrt-fastmath-tune.ll
|
|
|
sqrt-fastmath.ll
|
[X86][SSE] Add SSE reciprocal estimate tests
|
2016-11-21 15:28:21 +00:00 |
sqrt.ll
|
|
|
sret-implicit.ll
|
|
|
sse1.ll
|
|
|
sse2-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse2-intrinsics-fast-isel.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
sse2-intrinsics-x86-upgrade.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse2-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse2-vector-shifts.ll
|
|
|
sse2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse3-avx-addsub-2.ll
|
|
|
sse3-avx-addsub.ll
|
Regenerate test.
|
2017-01-13 17:44:28 +00:00 |
sse3-intrinsics-fast-isel.ll
|
|
|
sse3-intrinsics-x86.ll
|
[AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when VEX or EVEX encoded instructions are being emitted. Make sure the tests all have an avx2 command line and an skx command line.
|
2016-11-06 02:03:58 +00:00 |
sse3.ll
|
|
|
sse4a-intrinsics-fast-isel.ll
|
|
|
sse4a-upgrade.ll
|
|
|
sse4a.ll
|
|
|
sse41-intrinsics-fast-isel.ll
|
|
|
sse41-intrinsics-x86-upgrade.ll
|
|
|
sse41-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse41-pmovxrm.ll
|
|
|
sse41.ll
|
|
|
sse42_64.ll
|
|
|
sse42-intrinsics-fast-isel-x86_64.ll
|
|
|
sse42-intrinsics-fast-isel.ll
|
|
|
sse42-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse42.ll
|
|
|
sse_partial_update.ll
|
[X86] Remove some intrinsic instructions from hasPartialRegUpdate
|
2016-12-12 05:07:17 +00:00 |
sse_reload_fold.ll
|
|
|
sse-align-0.ll
|
|
|
sse-align-1.ll
|
|
|
sse-align-2.ll
|
|
|
sse-align-3.ll
|
|
|
sse-align-4.ll
|
|
|
sse-align-5.ll
|
|
|
sse-align-6.ll
|
|
|
sse-align-7.ll
|
|
|
sse-align-8.ll
|
|
|
sse-align-9.ll
|
|
|
sse-align-10.ll
|
|
|
sse-align-11.ll
|
|
|
sse-align-12.ll
|
|
|
sse-commute.ll
|
|
|
sse-domains.ll
|
|
|
sse-fcopysign.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse-fsignum.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
sse-intel-ocl.ll
|
|
|
sse-intrinsics-fast-isel-x86_64.ll
|
|
|
sse-intrinsics-fast-isel.ll
|
|
|
sse-intrinsics-x86-upgrade.ll
|
[X86] Remove the scalar intrinsics for fadd/fsub/fdiv/fmul
|
2016-11-16 05:24:10 +00:00 |
sse-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse-load-ret.ll
|
|
|
sse-minmax.ll
|
Regenerate test with update_llc_test_checks.py
|
2017-01-13 16:37:38 +00:00 |
sse-only.ll
|
|
|
sse-regcall.ll
|
|
|
sse-scalar-fp-arith-unary.ll
|
|
|
sse-scalar-fp-arith.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
sse-unaligned-mem-feature.ll
|
|
|
sse-varargs.ll
|
|
|
ssp-data-layout.ll
|
|
|
ssp-guard-spill.ll
|
|
|
ssse3-intrinsics-fast-isel.ll
|
|
|
ssse3-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
stack_guard_remat.ll
|
|
|
stack-align2.ll
|
|
|
stack-align-memcpy.ll
|
|
|
stack-align.ll
|
|
|
stack-folding-3dnow.ll
|
|
|
stack-folding-adx-x86_64.ll
|
|
|
stack-folding-fp-avx1.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-fp-avx512.ll
|
[X86] Add masked versions of VPERMT2* and VPERMI2* to load folding tables.
|
2016-12-09 05:20:11 +00:00 |
stack-folding-fp-avx512vl.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
stack-folding-fp-sse42.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-int-avx1.ll
|
[X86][SSE] Fix vpextrd/vpextrq checks
|
2016-12-07 15:10:05 +00:00 |
stack-folding-int-avx2.ll
|
|
|
stack-folding-int-avx512.ll
|
[AVX-512] Add all forms of VPALIGNR, VALIGND, and VALIGNQ to the load folding tables.
|
2016-12-27 06:51:09 +00:00 |
stack-folding-int-avx512vl.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
stack-folding-int-sse42.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-mmx.ll
|
|
|
stack-folding-x86_64.ll
|
|
|
stack-folding-xop.ll
|
|
|
stack-probe-size.ll
|
|
|
stack-protector-dbginfo.ll
|
|
|
stack-protector-msvc.ll
|
|
|
stack-protector-target.ll
|
|
|
stack-protector-vreg-to-vreg-copy.ll
|
|
|
stack-protector-weight.ll
|
|
|
stack-protector.ll
|
Recommit r288212: Emit 'no line' information for interesting 'orphan' instructions.
|
2016-12-12 20:49:11 +00:00 |
stack-update-frame-opcode.ll
|
|
|
StackColoring-dbg.ll
|
|
|
StackColoring.ll
|
|
|
stackguard-internal.ll
|
|
|
stackmap-fast-isel.ll
|
|
|
stackmap-frame-setup.ll
|
|
|
stackmap-large-constants.ll
|
|
|
stackmap-liveness.ll
|
|
|
stackmap-nops.ll
|
|
|
stackmap-shadow-optimization.ll
|
|
|
stackmap.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
stackpointer.ll
|
|
|
statepoint-allocas.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-call-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-far-call.ll
|
|
|
statepoint-forward.ll
|
|
|
statepoint-gctransition-call-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-invoke.ll
|
|
|
statepoint-live-in.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
statepoint-stack-usage.ll
|
[Statepoints] Reuse stack slots more than once within a basic block
|
2016-12-13 01:21:15 +00:00 |
statepoint-stackmap-format.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-uniqueing.ll
|
|
|
statepoint-vector-bad-spill.ll
|
|
|
statepoint-vector.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
stdarg.ll
|
|
|
stdcall-notailcall.ll
|
|
|
stdcall.ll
|
|
|
store_op_load_fold2.ll
|
|
|
store_op_load_fold.ll
|
|
|
store-empty-member.ll
|
|
|
store-fp-constant.ll
|
|
|
store-global-address.ll
|
|
|
store-narrow.ll
|
|
|
store-zero-and-minus-one.ll
|
|
|
stores-merging.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
storetrunc-fp.ll
|
|
|
stride-nine-with-base-reg.ll
|
|
|
stride-reuse.ll
|
|
|
sub-with-overflow.ll
|
|
|
sub.ll
|
|
|
subreg-to-reg-0.ll
|
|
|
subreg-to-reg-1.ll
|
|
|
subreg-to-reg-2.ll
|
|
|
subreg-to-reg-3.ll
|
|
|
subreg-to-reg-4.ll
|
|
|
subreg-to-reg-6.ll
|
|
|
subvector-broadcast.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
sunkaddr-ext.ll
|
|
|
swift-return.ll
|
|
|
swifterror.ll
|
|
|
swiftself.ll
|
|
|
switch-bt.ll
|
|
|
switch-crit-edge-constant.ll
|
|
|
switch-default-only.ll
|
|
|
switch-density.ll
|
|
|
switch-edge-weight.ll
|
|
|
switch-jump-table.ll
|
|
|
switch-or.ll
|
|
|
switch-order-weight.ll
|
|
|
switch-zextload.ll
|
|
|
switch.ll
|
|
|
SwitchLowering.ll
|
|
|
swizzle-2.ll
|
|
|
swizzle-avx2.ll
|
|
|
SwizzleShuff.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
system-intrinsics-64-xsave.ll
|
|
|
system-intrinsics-64-xsavec.ll
|
|
|
system-intrinsics-64-xsaveopt.ll
|
|
|
system-intrinsics-64-xsaves.ll
|
|
|
system-intrinsics-64.ll
|
|
|
system-intrinsics-xgetbv.ll
|
|
|
system-intrinsics-xsave.ll
|
|
|
system-intrinsics-xsavec.ll
|
|
|
system-intrinsics-xsaveopt.ll
|
|
|
system-intrinsics-xsaves.ll
|
|
|
system-intrinsics-xsetbv.ll
|
|
|
system-intrinsics.ll
|
|
|
tail-call-attrs.ll
|
|
|
tail-call-casts.ll
|
|
|
tail-call-conditional.mir
|
CodeGen: Assert that liveness is up to date when reading block live-ins.
|
2017-01-05 20:01:19 +00:00 |
tail-call-got.ll
|
|
|
tail-call-legality.ll
|
|
|
tail-call-parameter-attrs-mismatch.ll
|
|
|
tail-call-win64.ll
|
|
|
tail-dup-addr.ll
|
|
|
tail-dup-catchret.ll
|
|
|
tail-dup-merge-loop-headers.ll
|
|
|
tail-dup-repeat.ll
|
|
|
tail-merge-after-mbp.ll
|
|
|
tail-merge-unreachable.ll
|
|
|
tail-merge-wineh.ll
|
|
|
tail-opts.ll
|
|
|
tail-threshold.ll
|
|
|
tailcall-64.ll
|
|
|
tailcall-calleesave.ll
|
|
|
tailcall-cgp-dup.ll
|
|
|
tailcall-disable.ll
|
|
|
tailcall-fastisel.ll
|
|
|
tailcall-largecode.ll
|
|
|
tailcall-mem-intrinsics.ll
|
|
|
tailcall-msvc-conventions.ll
|
|
|
tailcall-multiret.ll
|
|
|
tailcall-readnone.ll
|
|
|
tailcall-returndup-void.ll
|
|
|
tailcall-ri64.ll
|
|
|
tailcall-stackalign.ll
|
|
|
tailcall-structret.ll
|
|
|
tailcall.ll
|
|
|
tailcallbyval64.ll
|
|
|
tailcallbyval.ll
|
|
|
tailcallfp2.ll
|
|
|
tailcallfp.ll
|
|
|
tailcallpic1.ll
|
|
|
tailcallpic2.ll
|
|
|
tailcallpic3.ll
|
|
|
tailcallstack64.ll
|
|
|
taildup-crash.ll
|
|
|
targetLoweringGeneric.ll
|
|
|
tbm_patterns.ll
|
|
|
tbm-intrinsics-fast-isel-x86_64.ll
|
|
|
tbm-intrinsics-fast-isel.ll
|
|
|
tbm-intrinsics-x86_64.ll
|
|
|
test-nofold.ll
|
|
|
test-shrink-bug.ll
|
|
|
test-shrink.ll
|
|
|
testb-je-fusion.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
testl-commute.ll
|
|
|
this-return-64.ll
|
|
|
tls-addr-non-leaf-function.ll
|
|
|
tls-android-negative.ll
|
|
|
tls-android.ll
|
|
|
tls-local-dynamic.ll
|
|
|
tls-models.ll
|
|
|
tls-pic.ll
|
|
|
tls-pie.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
tls-shrink-wrapping.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
tls-windows-itanium.ll
|
|
|
tls.ll
|
|
|
tlv-1.ll
|
|
|
tlv-2.ll
|
|
|
tlv-3.ll
|
|
|
token_landingpad.ll
|
|
|
trap.ll
|
|
|
trunc-ext-ld-st.ll
|
|
|
trunc-store.ll
|
|
|
trunc-to-bool.ll
|
|
|
TruncAssertZext.ll
|
|
|
twoaddr-coalesce-2.ll
|
|
|
twoaddr-coalesce-3.ll
|
|
|
twoaddr-coalesce.ll
|
|
|
twoaddr-lea.ll
|
|
|
twoaddr-pass-sink.ll
|
|
|
twoaddr-sink-terminator.ll
|
|
|
uint64-to-float.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
uint_to_fp-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
uint_to_fp-3.ll
|
|
|
uint_to_fp.ll
|
|
|
umul-with-carry.ll
|
|
|
umul-with-overflow.ll
|
|
|
unaligned-32-byte-memops.ll
|
|
|
unaligned-load.ll
|
|
|
unaligned-spill-folding.ll
|
|
|
undef-label.ll
|
|
|
unknown-location.ll
|
[DWARF] Preserve column number when emitting 'line 0' record
|
2016-12-14 00:27:35 +00:00 |
unreachable-loop-sinking.ll
|
|
|
unreachableblockelim.ll
|
|
|
unused_stackslots.ll
|
|
|
unwind-init.ll
|
|
|
unwindraise.ll
|
|
|
update-terminator.mir
|
|
|
urem-i8-constant.ll
|
|
|
urem-power-of-two.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
use-add-flags.ll
|
|
|
utf8.ll
|
|
|
utf16-cfstrings.ll
|
|
|
v2f32.ll
|
|
|
v4f32-immediate.ll
|
|
|
v4i32load-crash.ll
|
|
|
v8i1-masks.ll
|
[TargetLowering] Fix undef vector element issue with true/false result handling
|
2016-11-08 15:07:01 +00:00 |
vaargs.ll
|
|
|
vararg_no_start.ll
|
|
|
vararg_tailcall.ll
|
|
|
vararg-callee-cleanup.ll
|
|
|
variable-sized-darwin-bzero.ll
|
|
|
variadic-node-pic.ll
|
|
|
vastart-defs-eflags.ll
|
|
|
vbinop-simplify-bug.ll
|
|
|
vec3.ll
|
|
|
vec_add.ll
|
|
|
vec_align_i256.ll
|
|
|
vec_align.ll
|
|
|
vec_anyext.ll
|
|
|
vec_call.ll
|
|
|
vec_cast2.ll
|
|
|
vec_cast.ll
|
|
|
vec_cmp_sint-128.ll
|
|
|
vec_cmp_uint-128.ll
|
|
|
vec_compare-sse4.ll
|
|
|
vec_compare.ll
|
|
|
vec_ctbits.ll
|
[VectorLegalizer] Expansion of CTLZ using CTPOP when possible
|
2016-11-08 14:10:28 +00:00 |
vec_ext_inreg.ll
|
|
|
vec_extract-avx.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_extract-mmx.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
vec_extract-sse4.ll
|
|
|
vec_extract.ll
|
|
|
vec_fabs.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec_floor.ll
|
|
|
vec_fneg.ll
|
|
|
vec_fp_to_int.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vec_fpext.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec_fptrunc.ll
|
|
|
vec_i64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_ins_extract-1.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_ins_extract.ll
|
|
|
vec_insert-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_insert-3.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_insert-4.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-5.ll
|
|
|
vec_insert-7.ll
|
|
|
vec_insert-8.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-9.ll
|
|
|
vec_insert-mmx.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_int_to_fp.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
vec_loadsingles.ll
|
|
|
vec_logical.ll
|
|
|
vec_minmax_match.ll
|
[ValueTracking] recognize even more variants of smin/smax
|
2016-11-13 20:04:52 +00:00 |
vec_minmax_sint.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vec_minmax_uint.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vec_partial.ll
|
|
|
vec_reassociate.ll
|
|
|
vec_return.ll
|
|
|
vec_round.ll
|
|
|
vec_sdiv_to_shift.ll
|
|
|
vec_set-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-3.ll
|
|
|
vec_set-4.ll
|
|
|
vec_set-6.ll
|
|
|
vec_set-7.ll
|
|
|
vec_set-8.ll
|
|
|
vec_set-A.ll
|
|
|
vec_set-B.ll
|
|
|
vec_set-C.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-D.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-F.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-H.ll
|
|
|
vec_set.ll
|
|
|
vec_setcc-2.ll
|
|
|
vec_setcc.ll
|
|
|
vec_shift2.ll
|
|
|
vec_shift3.ll
|
|
|
vec_shift4.ll
|
|
|
vec_shift5.ll
|
|
|
vec_shift6.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
vec_shift7.ll
|
|
|
vec_shift.ll
|
|
|
vec_shuf-insert.ll
|
|
|
vec_split.ll
|
|
|
vec_ss_load_fold.ll
|
[X86] Teach selectScalarSSELoad to accept full 128-bit vector loads and the X86ISD::VZEXT_LOAD opcode.
|
2016-12-12 07:57:24 +00:00 |
vec_trunc_sext.ll
|
|
|
vec_udiv_to_shift.ll
|
|
|
vec_uint_to_fp-fastmath.ll
|
[X86][SSE] Add support for extracting constant bit data from broadcasted constants
|
2016-12-02 13:16:08 +00:00 |
vec_uint_to_fp.ll
|
|
|
vec_unsafe-fp-math.ll
|
|
|
vec_zero_cse.ll
|
|
|
vec_zero-2.ll
|
|
|
vec_zero.ll
|
|
|
vec-copysign-avx512.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec-copysign.ll
|
|
|
vec-loadsingles-alignment.ll
|
|
|
vec-trunc-store.ll
|
|
|
vector-bitreverse.ll
|
|
|
vector-blend.ll
|
|
|
vector-compare-combines.ll
|
|
|
vector-compare-results.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-gep.ll
|
|
|
vector-half-conversions.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-idiv-sdiv-128.ll
|
|
|
vector-idiv-sdiv-256.ll
|
|
|
vector-idiv-sdiv-512.ll
|
|
|
vector-idiv-udiv-128.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
vector-idiv-udiv-256.ll
|
|
|
vector-idiv-udiv-512.ll
|
|
|
vector-idiv.ll
|
|
|
vector-interleave.ll
|
|
|
vector-intrinsics.ll
|
|
|
vector-lzcnt-128.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
vector-lzcnt-256.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-lzcnt-512.ll
|
|
|
vector-merge-store-fp-constants.ll
|
|
|
vector-pcmp.ll
|
|
|
vector-popcnt-128.ll
|
[X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.
|
2016-11-29 14:18:51 +00:00 |
vector-popcnt-256.ll
|
[X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.
|
2016-11-29 14:18:51 +00:00 |
vector-popcnt-512.ll
|
|
|
vector-rem.ll
|
|
|
vector-rotate-128.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
vector-rotate-256.ll
|
|
|
vector-sext.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-shift-ashr-128.ll
|
[X86][AVX512] Add support for variable ASHR v2i64/v4i64 support without VLX
|
2017-01-13 13:16:19 +00:00 |
vector-shift-ashr-256.ll
|
[X86][AVX512] Add support for variable ASHR v2i64/v4i64 support without VLX
|
2017-01-13 13:16:19 +00:00 |
vector-shift-ashr-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shift-lshr-128.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-lshr-256.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-lshr-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shift-shl-128.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-shl-256.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-shl-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shuffle-128-v2.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-128-v4.ll
|
[X86][AVX] Regenerate shuffle 128-bit tests.
|
2017-01-06 15:56:52 +00:00 |
vector-shuffle-128-v8.ll
|
[X86][AVX] Regenerate shuffle 128-bit tests.
|
2017-01-06 15:56:52 +00:00 |
vector-shuffle-128-v16.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-256-v4.ll
|
[X86][AVX] Bad v4f64/v4i64 '1z3z' shuffle test case
|
2017-01-13 18:23:47 +00:00 |
vector-shuffle-256-v8.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-shuffle-256-v16.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-256-v32.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-512-v8.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-512-v16.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-512-v32.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-512-v64.ll
|
[X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffles (PR31470)
|
2017-01-07 15:37:50 +00:00 |
vector-shuffle-avx512.ll
|
[X86][AVX512] Adding missing shuffle lowering to blend mask instructions
|
2017-01-13 09:06:00 +00:00 |
vector-shuffle-combining-avx2.ll
|
[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
vector-shuffle-combining-avx512bw.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPD.
|
2016-12-11 21:26:25 +00:00 |
vector-shuffle-combining-avx512bwvl.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-combining-avx512vbmi.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-combining-avx.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
vector-shuffle-combining-ssse3.ll
|
[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
vector-shuffle-combining-xop.ll
|
[X86][XOP] Add vpermil2ps target shuffle -> insertps combine test
|
2017-01-11 18:48:00 +00:00 |
vector-shuffle-combining.ll
|
[X86][SSE] Combine shuffles to MOVSS/MOVSD whatever the domain.
|
2016-12-16 11:48:51 +00:00 |
vector-shuffle-masked.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
vector-shuffle-mmx.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
vector-shuffle-sse1.ll
|
|
|
vector-shuffle-sse4a.ll
|
|
|
vector-shuffle-sse41.ll
|
|
|
vector-shuffle-v1.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-shuffle-variable-128.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vector-shuffle-variable-256.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vector-sqrt.ll
|
Extra coverage tests to demonstrate fixes in D72618 and D26855
|
2016-12-16 09:56:02 +00:00 |
vector-trunc-math.ll
|
[X86] Attempt to pre-truncate arithmetic operations if useful
|
2017-01-04 08:05:42 +00:00 |
vector-trunc.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-tzcnt-128.ll
|
[X86][AVX] Regenerate tzcnt tests.
|
2017-01-06 15:54:23 +00:00 |
vector-tzcnt-256.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-tzcnt-512.ll
|
|
|
vector-variable-idx2.ll
|
|
|
vector-variable-idx.ll
|
|
|
vector-zext.ll
|
[X86][SSE] Add support for combining target shuffles to AND bitmasks.
|
2016-12-01 13:47:02 +00:00 |
vector-zmov.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vector.ll
|
|
|
vectorcall.ll
|
[X86] Vectorcall Calling Convention - Adding CodeGen Complete Support
|
2016-12-21 09:18:37 +00:00 |
version_directive.ll
|
|
|
vfcmp.ll
|
|
|
viabs.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
virtual-registers-cleared-in-machine-functions-liveins.ll
|
|
|
visibility2.ll
|
|
|
visibility.ll
|
|
|
vmovq.ll
|
|
|
volatile.ll
|
|
|
vortex-bug.ll
|
|
|
vselect-2.ll
|
|
|
vselect-avx.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
vselect-minmax.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vselect.ll
|
|
|
vshift_scalar.ll
|
|
|
vshift_split2.ll
|
|
|
vshift_split.ll
|
|
|
vshift-1.ll
|
|
|
vshift-2.ll
|
|
|
vshift-3.ll
|
|
|
vshift-4.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
vshift-5.ll
|
|
|
vshift-6.ll
|
|
|
vsplit-and.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
vzero-excess.ll
|
|
|
warn-stack.ll
|
|
|
weak_def_can_be_hidden.ll
|
|
|
weak.ll
|
|
|
webkit-jscc.ll
|
|
|
wide-fma-contraction.ll
|
|
|
wide-integer-cmp.ll
|
|
|
wide-integer-fold.ll
|
|
|
widen_arith-1.ll
|
|
|
widen_arith-2.ll
|
|
|
widen_arith-3.ll
|
|
|
widen_arith-4.ll
|
|
|
widen_arith-5.ll
|
|
|
widen_arith-6.ll
|
|
|
widen_bitops-0.ll
|
|
|
widen_bitops-1.ll
|
|
|
widen_cast-1.ll
|
|
|
widen_cast-2.ll
|
|
|
widen_cast-3.ll
|
|
|
widen_cast-4.ll
|
|
|
widen_cast-5.ll
|
|
|
widen_cast-6.ll
|
|
|
widen_compare-1.ll
|
|
|
widen_conv-1.ll
|
|
|
widen_conv-2.ll
|
|
|
widen_conv-3.ll
|
|
|
widen_conv-4.ll
|
|
|
widen_conversions.ll
|
|
|
widen_extract-1.ll
|
|
|
widen_load-0.ll
|
|
|
widen_load-1.ll
|
|
|
widen_load-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
widen_shuffle-1.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
WidenArith.ll
|
|
|
widened-broadcast.ll
|
|
|
win32_sret.ll
|
|
|
win32-eh-states.ll
|
|
|
win32-eh.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
win32-pic-jumptable.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
win32-seh-catchpad-realign.ll
|
|
|
win32-seh-catchpad.ll
|
|
|
win32-seh-nested-finally.ll
|
|
|
win32-spill-xmm.ll
|
|
|
win64_alloca_dynalloca.ll
|
|
|
win64_call_epi.ll
|
|
|
win64_eh_leaf.ll
|
|
|
win64_eh.ll
|
|
|
win64_frame.ll
|
|
|
win64_nonvol.ll
|
|
|
win64_params.ll
|
|
|
win64_sibcall.ll
|
|
|
win64_vararg.ll
|
|
|
win64-jumptable.ll
|
Revert "[COFF] Use 32-bit jump table entries in .rdata for Win64"
|
2016-12-29 17:07:10 +00:00 |
win64-nosse-csrs.ll
|
|
|
win_chkstk.ll
|
|
|
win_coreclr_chkstk.ll
|
|
|
win_cst_pool.ll
|
|
|
win-alloca-expander.ll
|
|
|
win-catchpad-csrs.ll
|
|
|
win-catchpad-nested-cxx.ll
|
|
|
win-catchpad-nested.ll
|
|
|
win-catchpad-varargs.ll
|
|
|
win-catchpad.ll
|
|
|
win-cleanuppad.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
win-funclet-cfi.ll
|
|
|
win-mixed-ehpersonality.ll
|
|
|
windows-itanium-alloca.ll
|
|
|
wineh-coreclr.ll
|
|
|
wineh-exceptionpointer.ll
|
|
|
wineh-no-ehpads.ll
|
|
|
x32-function_pointer-1.ll
|
|
|
x32-function_pointer-2.ll
|
|
|
x32-function_pointer-3.ll
|
|
|
x32-indirectbr.ll
|
|
|
x32-landingpad.ll
|
|
|
x32-lea-1.ll
|
|
|
x32-movtopush64.ll
|
|
|
x32-va_start.ll
|
|
|
x86_64-mul-by-const.ll
|
|
|
x86-16.ll
|
|
|
x86-32-intrcc.ll
|
|
|
x86-32-vector-calling-conv.ll
|
|
|
x86-64-and-mask.ll
|
|
|
x86-64-arg.ll
|
|
|
x86-64-asm.ll
|
|
|
x86-64-baseptr.ll
|
|
|
x86-64-call.ll
|
|
|
x86-64-dead-stack-adjust.ll
|
|
|
x86-64-disp.ll
|
|
|
x86-64-double-precision-shift-left.ll
|
|
|
x86-64-double-precision-shift-right.ll
|
|
|
x86-64-double-shifts-Oz-Os-O2.ll
|
|
|
x86-64-double-shifts-var.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
x86-64-extend-shift.ll
|
|
|
x86-64-flags-intrinsics.ll
|
|
|
x86-64-gv-offset.ll
|
|
|
x86-64-intrcc.ll
|
|
|
x86-64-jumps.ll
|
|
|
x86-64-mem.ll
|
|
|
x86-64-ms_abi-vararg.ll
|
|
|
x86-64-pic-1.ll
|
|
|
x86-64-pic-2.ll
|
|
|
x86-64-pic-3.ll
|
|
|
x86-64-pic-4.ll
|
|
|
x86-64-pic-5.ll
|
|
|
x86-64-pic-6.ll
|
|
|
x86-64-pic-7.ll
|
|
|
x86-64-pic-8.ll
|
|
|
x86-64-pic-9.ll
|
|
|
x86-64-pic-10.ll
|
|
|
x86-64-pic-11.ll
|
|
|
x86-64-pic-12.ll
|
|
|
x86-64-pic.ll
|
|
|
x86-64-plt-relative-reloc.ll
|
|
|
x86-64-psub.ll
|
|
|
x86-64-ptr-arg-simple.ll
|
|
|
x86-64-ret0.ll
|
|
|
x86-64-shortint.ll
|
|
|
x86-64-sret-return-2.ll
|
|
|
x86-64-sret-return.ll
|
|
|
x86-64-stack-and-frame-ptr.ll
|
|
|
x86-64-static-relo-movl.ll
|
|
|
x86-64-tls-1.ll
|
|
|
x86-64-varargs.ll
|
|
|
x86-big-ret.ll
|
|
|
x86-flags-intrinsics.ll
|
|
|
x86-fold-pshufb.ll
|
|
|
x86-framelowering-trap.ll
|
|
|
x86-inline-asm-validation.ll
|
|
|
x86-interleaved-access.ll
|
|
|
x86-interrupt_cc.ll
|
|
|
x86-interrupt_cld.ll
|
|
|
x86-interrupt_vzeroupper.ll
|
|
|
x86-mixed-alignment-dagcombine.ll
|
|
|
x86-plt-relative-reloc.ll
|
|
|
x86-repmov-copy-eflags.ll
|
|
|
x86-sanitizer-shrink-wrapping.ll
|
|
|
x86-setcc-int-to-fp-combine.ll
|
|
|
x86-shifts.ll
|
|
|
x86-shrink-wrap-unwind.ll
|
|
|
x86-shrink-wrapping.ll
|
|
|
x86-store-gv-addr.ll
|
|
|
x86-upgrade-avx2-vbroadcast.ll
|
|
|
x86-upgrade-avx-vbroadcast.ll
|
|
|
x86-win64-shrink-wrapping.ll
|
|
|
x87.ll
|
|
|
xaluo.ll
|
|
|
xmm-r64.ll
|
|
|
xmulo.ll
|
|
|
xop-intrinsics-fast-isel.ll
|
|
|
xop-intrinsics-x86_64-upgrade.ll
|
|
|
xop-intrinsics-x86_64.ll
|
|
|
xop-mask-comments.ll
|
|
|
xop-pcmov.ll
|
|
|
xor-icmp.ll
|
|
|
xor-select-i1-combine.ll
|
|
|
xor.ll
|
|
|
xray-attribute-instrumentation.ll
|
[xray] Add XRay support for Mach-O in CodeGen
|
2016-11-23 02:07:04 +00:00 |
xray-empty-firstmbb.mir
|
[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)
|
2016-12-19 09:20:38 +00:00 |
xray-empty-function.mir
|
[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)
|
2016-12-19 09:20:38 +00:00 |
xray-multiplerets-in-blocks.mir
|
|
|
xray-section-group.ll
|
|
|
xray-selective-instrumentation-miss.ll
|
|
|
xray-selective-instrumentation.ll
|
|
|
xray-tail-call-sled.ll
|
[xray] Add XRay support for Mach-O in CodeGen
|
2016-11-23 02:07:04 +00:00 |
xtest.ll
|
|
|
zero-remat.ll
|
|
|
zext-extract_subreg.ll
|
|
|
zext-fold.ll
|
|
|
zext-inreg-0.ll
|
|
|
zext-inreg-1.ll
|
|
|
zext-sext.ll
|
|
|
zext-shl.ll
|
|
|
zext-trunc.ll
|
|
|
zlib-longest-match.ll
|
|
|