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808a3386e2
alignment requirements, for example in the case of vectors. These requirements are exploited by the code generator by using move instructions that have similar alignment requirements, e.g., movaps on x86. Although the code generator properly aligns the arguments with respect to the displacement of the stack pointer it computes, the displacement itself may cause misalignment. For example if we have %3 = load <16 x float>, <16 x float>* %1, align 64 call void @bar(<16 x float> %3, i32 0) the x86 back-end emits: movaps 32(%ecx), %xmm2 movaps (%ecx), %xmm0 movaps 16(%ecx), %xmm1 movaps 48(%ecx), %xmm3 subl $20, %esp <-- if %esp was 16-byte aligned before this instruction, it no longer will be afterwards movaps %xmm3, (%esp) <-- movaps requires 16-byte alignment, while %esp is not aligned as such. movl $0, 16(%esp) calll __bar To solve this, we need to make sure that the computed value with which the stack pointer is changed is a multiple af the maximal alignment seen during its computation. With this change we get proper alignment: subl $32, %esp movaps %xmm3, (%esp) Differential Revision: http://reviews.llvm.org/D12337 llvm-svn: 248786
41 lines
1.1 KiB
LLVM
41 lines
1.1 KiB
LLVM
; RUN: llc -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse < %s | FileCheck %s
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; Check proper alignment of spilled vector
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; CHECK-LABEL: spill_ok
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; CHECK: subl $32, %esp
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; CHECK: movaps %xmm3, (%esp)
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; CHECK: movl $0, 16(%esp)
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; CHECK: calll _bar
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define void @spill_ok(i32, <16 x float> *) {
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entry:
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%2 = alloca i32, i32 %0
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%3 = load <16 x float>, <16 x float> * %1, align 64
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tail call void @bar(<16 x float> %3, i32 0) nounwind
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ret void
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}
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declare void @bar(<16 x float> %a, i32 %b)
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; Check that proper alignment of spilled vector does not affect vargs
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; CHECK-LABEL: vargs_not_affected
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; CHECK: leal 28(%ebp), %eax
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define i32 @vargs_not_affected(<4 x float> %v, i8* %f, ...) {
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entry:
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%ap = alloca i8*, align 4
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%0 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %0)
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%argp.cur = load i8*, i8** %ap, align 4
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%argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
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store i8* %argp.next, i8** %ap, align 4
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%1 = bitcast i8* %argp.cur to i32*
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%2 = load i32, i32* %1, align 4
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call void @llvm.va_end(i8* %0)
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ret i32 %2
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}
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declare void @llvm.va_start(i8*)
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declare void @llvm.va_end(i8*)
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