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llvm-mirror/test/CodeGen
Jakob Stoklund Olesen 442e38c4de Mostly rewrite RegAllocFast.
Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.

The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.

Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.

llvm-svn: 103488
2010-05-11 18:54:45 +00:00
..
Alpha
ARM Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. 2010-05-11 07:26:32 +00:00
Blackfin
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic SDDbgValues are apparently not being legalized. Fix a symptom of the problem, 2010-05-07 22:19:08 +00:00
MBlaze
Mips
MSP430 Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1), 2010-05-01 12:52:34 +00:00
PIC16
PowerPC Implement builtin_return_address(x) and builtin_frame_address(x) 2010-05-03 22:59:34 +00:00
SPARC
SystemZ
Thumb Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction. 2010-05-11 07:26:32 +00:00
Thumb2 Clean up the conditional for handling of sign_extend_inreg based on 2010-05-07 18:34:55 +00:00
X86 Mostly rewrite RegAllocFast. 2010-05-11 18:54:45 +00:00
XCore