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llvm-mirror/test/CodeGen/MIR/X86/basic-block-liveins.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

66 lines
1.2 KiB
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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses basic block liveins correctly.
--- |
define i32 @test(i32 %a, i32 %b) {
body:
%c = add i32 %a, %b
ret i32 %c
}
define i32 @test2(i32 %a, i32 %b) {
body:
%c = add i32 %a, %b
ret i32 %c
}
define i32 @test3() {
body:
ret i32 0
}
...
---
name: test
tracksRegLiveness: true
body: |
; CHECK-LABEL: bb.0.body:
; CHECK-NEXT: liveins: $edi, $esi
bb.0.body:
liveins: $edi, $esi
$eax = LEA64_32r killed $rdi, 1, killed $rsi, 0, _
RETQ $eax
...
---
name: test2
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: test2
; Verify that we can have multiple lists of liveins that will be merged into
; one.
; CHECK: bb.0.body:
; CHECK-NEXT: liveins: $edi, $esi
bb.0.body:
liveins: $edi
liveins: $esi
$eax = LEA64_32r killed $rdi, 1, killed $rsi, 0, _
RETQ $eax
...
---
name: test3
tracksRegLiveness: true
body: |
; Verify that we can have an empty list of liveins.
; CHECK-LABEL: name: test3
; CHECK: bb.0.body:
; CHECK-NEXT: $eax = MOV32r0 implicit-def dead $eflags
bb.0.body:
liveins:
$eax = MOV32r0 implicit-def dead $eflags
RETQ killed $eax
...