mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
5c5e25358e
CheckInteger uses an int64_t encoded using a variable width encoding that is optimized for encoding a number with a lot of leading zeros. Negative numbers have no leading zeros so use the largest encoding requiring 9 bytes. I believe its most like we want to check for positive and negative numbers near 0. -1 is quite common due to its use in the 'not' idiom. To optimize for this, we can borrow an idea from the bitcode format and move the sign bit to bit 0 with the magnitude stored in the upper bits. This will drastically increase the number of leading zeros for small magnitudes. Then we can run this value through VBR encoding. This gives a small reduction in the table size on all in tree targets except VE where size increased by about 300 bytes due to intrinsic ids now requiring 3 bytes instead of 2. Since the intrinsic enum space is shared by all targets this an unfortunate consquence of where VE is currently located in the range. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D96317 |
||
---|---|---|
.. | ||
GlobalISel | ||
AsmMatcherEmitter.cpp | ||
AsmWriterEmitter.cpp | ||
AsmWriterInst.cpp | ||
AsmWriterInst.h | ||
Attributes.cpp | ||
CallingConvEmitter.cpp | ||
CMakeLists.txt | ||
CodeEmitterGen.cpp | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenHwModes.cpp | ||
CodeGenHwModes.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.h | ||
CodeGenMapTable.cpp | ||
CodeGenRegisters.cpp | ||
CodeGenRegisters.h | ||
CodeGenSchedule.cpp | ||
CodeGenSchedule.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
CTagsEmitter.cpp | ||
DAGISelEmitter.cpp | ||
DAGISelMatcher.cpp | ||
DAGISelMatcher.h | ||
DAGISelMatcherEmitter.cpp | ||
DAGISelMatcherGen.cpp | ||
DAGISelMatcherOpt.cpp | ||
DFAEmitter.cpp | ||
DFAEmitter.h | ||
DFAPacketizerEmitter.cpp | ||
DirectiveEmitter.cpp | ||
DisassemblerEmitter.cpp | ||
ExegesisEmitter.cpp | ||
FastISelEmitter.cpp | ||
FixedLenDecoderEmitter.cpp | ||
GICombinerEmitter.cpp | ||
GlobalISelEmitter.cpp | ||
InfoByHwMode.cpp | ||
InfoByHwMode.h | ||
InstrDocsEmitter.cpp | ||
InstrInfoEmitter.cpp | ||
IntrinsicEmitter.cpp | ||
OptEmitter.cpp | ||
OptEmitter.h | ||
OptParserEmitter.cpp | ||
OptRSTEmitter.cpp | ||
PredicateExpander.cpp | ||
PredicateExpander.h | ||
PseudoLoweringEmitter.cpp | ||
RegisterBankEmitter.cpp | ||
RegisterInfoEmitter.cpp | ||
RISCVCompressInstEmitter.cpp | ||
SDNodeProperties.cpp | ||
SDNodeProperties.h | ||
SearchableTableEmitter.cpp | ||
SequenceToOffsetTable.h | ||
SubtargetEmitter.cpp | ||
SubtargetFeatureInfo.cpp | ||
SubtargetFeatureInfo.h | ||
TableGen.cpp | ||
TableGenBackends.h | ||
tdtags | ||
Types.cpp | ||
Types.h | ||
WebAssemblyDisassemblerEmitter.cpp | ||
WebAssemblyDisassemblerEmitter.h | ||
X86DisassemblerShared.h | ||
X86DisassemblerTables.cpp | ||
X86DisassemblerTables.h | ||
X86EVEX2VEXTablesEmitter.cpp | ||
X86FoldTablesEmitter.cpp | ||
X86ModRMFilters.cpp | ||
X86ModRMFilters.h | ||
X86RecognizableInstr.cpp | ||
X86RecognizableInstr.h |