David Sherwood 6c7452123a [SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll ...

Previous patches fixed up all the warnings in this test:

  llvm/test/CodeGen/AArch64/sve-sext-zext.ll

and this change simply checks that no new warnings are added in future.

Differential revision: https://reviews.llvm.org/D83205

2020-07-29 13:06:39 +01:00

..

AArch64

[SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll

2020-07-29 13:06:39 +01:00

AMDGPU

AMDGPU: Optimize copies to exec with other insts after exec def

2020-07-28 21:34:50 -04:00

ARC

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ARM

ARM: make Thumb1 instructions non-flag-setting in IT block.

2020-07-28 13:31:17 +01:00

AVR

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BPF

[llvm-readobj] Update tests because of changes in llvm-readobj behavior

2020-07-20 10:39:04 +01:00

Generic

[llc] (almost) remove --print-machineinstrs

2020-07-20 10:43:28 -07:00

Hexagon

[Hexagon] Correct the order of operands when lowering funnel shift-left

2020-07-28 21:22:41 -05:00

Inputs

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Lanai

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Mips

[llvm-readobj] Update tests because of changes in llvm-readobj behavior

2020-07-20 10:39:04 +01:00

MIR

AMDGPU: Serialize MFI spill fields

2020-07-28 20:01:57 -04:00

MSP430

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NVPTX

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PowerPC

Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"

2020-07-28 14:00:11 +00:00

RISCV

[llvm-readobj] Update tests because of changes in llvm-readobj behavior

2020-07-20 10:39:04 +01:00

SPARC

[llvm-readobj] Update tests because of changes in llvm-readobj behavior

2020-07-20 10:39:04 +01:00

SystemZ

[SystemZ] Ensure -mno-vx disables any use of vector features

2020-07-23 15:34:59 +02:00

Thumb

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Thumb2

[ARM][MVE] Teach MVEGatherScatterLowering to merge successive getelementpointers

2020-07-28 17:31:20 +01:00

VE

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WebAssembly

[WebAssembly] Remove intrinsics for SIMD widening ops

2020-07-28 18:25:55 -07:00

WinCFGuard

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WinEH

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X86

[X86][SSE] getV4X86ShuffleImm8 - canonicalize broadcast masks

2020-07-29 11:32:44 +01:00

XCore

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