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4bf7d5872e
Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.
52 lines
1.7 KiB
YAML
52 lines
1.7 KiB
YAML
# RUN: llc -march=hexagon -run-pass hexagon-cext-opt %s -o - | FileCheck %s
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# Skip fixed stack indices in hexagon-cext. The reason is that they cannot
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# be stored as indices (stackSlot2Index) together with registers and
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# non-fixed stack slots.
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# Check that this doesn't crash.
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# CHECK: L2_loadrb_io %fixed-stack.0, 1496
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--- |
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target triple = "hexagon"
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%s.0 = type { %s.1, i32, i8, i8, i8, i8, i8, i64, %s.2, %s.5, i8 }
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%s.1 = type { i8, i8, i8, i8 }
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%s.2 = type { %s.3 }
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%s.3 = type { i8, i8, %s.4, i32, i8 }
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%s.4 = type { [3 x i8] }
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%s.5 = type { i32, i32, [10 x %s.6], %s.9 }
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%s.6 = type { %s.7, i8, i32, i8, %s.7 }
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%s.7 = type { %s.8 }
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%s.8 = type { i64, i64, i64, i64, i64, i64, i64, i64 }
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%s.9 = type { i8, i8 }
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; Function Attrs: nounwind optsize
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define dso_local void @f0(%s.0* byval(%s.0) nocapture readonly align 8 %a0) local_unnamed_addr #0 {
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b0:
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%v0 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 10
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%v1 = load i8, i8* %v0, align 8
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%v2 = tail call i8* @f1(i8 signext %v1) #0
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unreachable
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}
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; Function Attrs: nounwind optsize
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declare dso_local i8* @f1(i8 signext) local_unnamed_addr #0
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attributes #0 = { nounwind optsize "target-cpu"="hexagonv65" }
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...
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name: f0
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, offset: 0, size: 1504, alignment: 8, isImmutable: true, isAliased: false }
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body: |
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bb.0:
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%0:intregs = L2_loadrb_io %fixed-stack.0, 1496
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ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29
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$r0 = COPY %0:intregs
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PS_call_nr @f1, implicit $r0, implicit-def $r29, implicit-def $r0
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ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29
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...
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