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llvm-mirror/test/CodeGen/Hexagon/packetize-nvj-no-prune.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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# RUN: llc -march=hexagon -run-pass hexagon-packetizer %s -o - | FileCheck %s
# Make sure that the new-value jump is packetized with the producer. In this
# case, the loads cold be packetized together (with updating the offset in
# the second load), but then the new-value jump would not be possible to
# put in the same packet.
# CHECK-LABEL: name: fred
# CHECK: BUNDLE
# CHECK-NEXT: $r3 = L2_loadri_io $r1, 0
# CHECK-NEXT: J4_cmpgtu_f_jumpnv_t internal killed $r3
--- |
define void @fred() { ret void }
@array = external global [256 x i32], align 8
...
---
name: fred
tracksRegLiveness: true
body: |
bb.0:
successors: %bb.1
$r1 = A2_tfrsi @array
$r2, $r1 = L2_loadri_pi $r1, 4
$r3 = L2_loadri_io $r1, 0
J4_cmpgtu_f_jumpnv_t killed $r3, killed $r2, %bb.1, implicit-def $pc
bb.1:
...