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42e0928a60
There is not match for the `MipsJmpLink texternalsym` and `MipsJmpLink tglobaladdr` patterns for microMIPS R6. As a result LLVM incorrectly selects the `JALRC16` compact 2-byte instruction which takes a target instruction address from a register only and assign `R_MIPS_32` relocation for this instruction. This relocation completely overwrites `JALRC16` and nearby instructions. This patch adds missed matching patterns, selects `BALC` instruction and assign a correct `R_MICROMIPS_PC26_S1` relocation. Differential Revision: https://reviews.llvm.org/D64552 llvm-svn: 365870
24 lines
746 B
LLVM
24 lines
746 B
LLVM
; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -stop-after=finalize-isel < %s | FileCheck --check-prefix=MM2 %s
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; RUN: llc -mtriple=mips-mti-linux-gnu -mcpu=mips32r6 -mattr=+micromips \
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; RUN: -stop-after=finalize-isel < %s | FileCheck --check-prefix=MM6 %s
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; MM2: JAL_MM @bar
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; MM2: JAL_MM &memset
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; MM2-NOT: JALR16_MM
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; MM6: JAL_MMR6 @bar
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; MM6: JAL_MMR6 &memset
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; MM6-NOT: JALRC16_MMR6
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define dso_local void @foo(i32* nocapture %ar) local_unnamed_addr {
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entry:
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call void @bar()
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%0 = bitcast i32* %ar to i8*
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tail call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 100, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1)
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declare void @bar()
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