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7f7bfe12ea
Follow-up of D72172 and D72180 This patch passes `uint64_t Address` to print methods of PC-relative operands so that subsequent target specific patches can change `*InstPrinter::print{Operand,PCRelImm,...}` to customize the output. Add MCInstPrinter::PrintBranchImmAsAddress which is set to true by llvm-objdump. ``` // Current llvm-objdump -d output aarch64: 20000: bl #0 ppc: 20000: bl .+4 x86: 20000: callq 0 // Ideal output aarch64: 20000: bl 0x20000 ppc: 20000: bl 0x20004 x86: 20000: callq 0x20005 // GNU objdump -d. The lack of 0x is not ideal because the result cannot be re-assembled aarch64: 20000: bl 20000 ppc: 20000: bl 0x20004 x86: 20000: callq 20005 ``` In `lib/Target/X86/X86GenAsmWriter1.inc` (generated by `llvm-tblgen -gen-asm-writer`): ``` case 12: // CALL64pcrel32, CALLpcrel16, CALLpcrel32, EH_SjLj_Setup, JCXZ, JECXZ, J... - printPCRelImm(MI, 0, O); + printPCRelImm(MI, Address, 0, O); return; ``` Some targets have 2 `printOperand` overloads, one without `Address` and one with `Address`. They should annotate derived `Operand` properly with `let OperandType = "OPERAND_PCREL"`. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D76574 |
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.. | ||
Disassembler | ||
MCTargetDesc | ||
TargetInfo | ||
ARC.h | ||
ARC.td | ||
ARCAsmPrinter.cpp | ||
ARCBranchFinalize.cpp | ||
ARCCallingConv.td | ||
ARCExpandPseudos.cpp | ||
ARCFrameLowering.cpp | ||
ARCFrameLowering.h | ||
ARCInstrFormats.td | ||
ARCInstrInfo.cpp | ||
ARCInstrInfo.h | ||
ARCInstrInfo.td | ||
ARCISelDAGToDAG.cpp | ||
ARCISelLowering.cpp | ||
ARCISelLowering.h | ||
ARCMachineFunctionInfo.cpp | ||
ARCMachineFunctionInfo.h | ||
ARCMCInstLower.cpp | ||
ARCMCInstLower.h | ||
ARCOptAddrMode.cpp | ||
ARCRegisterInfo.cpp | ||
ARCRegisterInfo.h | ||
ARCRegisterInfo.td | ||
ARCSubtarget.cpp | ||
ARCSubtarget.h | ||
ARCTargetMachine.cpp | ||
ARCTargetMachine.h | ||
ARCTargetStreamer.h | ||
ARCTargetTransformInfo.h | ||
CMakeLists.txt | ||
LLVMBuild.txt |