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llvm-mirror/test
Craig Topper 838aaca549 [X86] Teach EltsFromConsecutiveLoads that it's ok to form a v4f32 VZEXT_LOAD with a 64 bit memory size on SSE1 targets.
We can use MOVLPS which will load 64 bits, but we need a v4f32
result type. We already have isel patterns for this.

The code here is a little hacky. We can probably improve it with
more isel patterns.
2020-02-22 18:50:52 -08:00
..
Analysis [SystemZ] Return scalarized costs for vector instructions on older archs. 2020-02-21 09:17:37 -08:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen [X86] Teach EltsFromConsecutiveLoads that it's ok to form a v4f32 VZEXT_LOAD with a 64 bit memory size on SSE1 targets. 2020-02-22 18:50:52 -08:00
DebugInfo Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
Demangle
Examples
ExecutionEngine [ORC] Update LLJIT to automatically run specially named initializer functions. 2020-02-22 11:49:14 -08:00
Feature
FileCheck
Instrumentation Reapply [IRBuilder] Always respect inserter/folder 2020-02-19 20:51:38 +01:00
Integer
JitListener
Linker
LTO
MachineVerifier
MC [MC][ELF] Error for sh_type, sh_flags or sh_entsize change 2020-02-21 15:44:14 -08:00
Object
ObjectYAML
Other Flags for displaying only hot nodes in CFGPrinter graph 2020-02-21 17:20:00 -08:00
Reduce
SafepointIRVerifier
Support
SymbolRewriter
TableGen TableGen: Fix logic for default operands 2020-02-19 23:41:07 -05:00
ThinLTO/X86
tools [yaml2obj] - Automatically assign sh_addr for allocatable sections. 2020-02-22 14:43:54 +03:00
Transforms [Attributor][FIX] Disable a test to unblock the builders 2020-02-21 14:43:31 -08:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh