Roman Tereshin a86792ba95 [GlobalISel] Match table opt: fix a bug in matching num of operands ... If there is a dag node with a variable number of operands that has at least N operands (for some non-negative N), and multiple patterns with that node with different number of operands, we would drop the number of operands check in patterns with N operands, presumably because it's guaranteed in such case that none of the per-operand checks will access the operand list out-of-bounds. Except semantically the check is about having exactly N operands, not at least N operands, and a backend might rely on it to disambiguate different patterns. In this patch we change the condition on emitting the number of operands check from "the instruction is not guaranteed to have at least as many operands as are checked by the pattern being matched" to "the instruction is not guaranteed to have a specific number of operands". We're relying (still) on the rest of the CodeGenPatterns mechanics to validate that the pattern itself doesn't try to access more operands than there is in the instruction in cases when the instruction does have fixed number of operands, and on the machine verifier to validate at runtime that particular MIs like that satisfy the constraint as well. Reviewers: dsanders, qcolombet Reviewed By: qcolombet Subscribers: arsenm, rovka, Petar.Avramovic, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69653		2019-11-01 01:57:48 -07:00
..
Common	GlobalISel/TableGen: Handle setcc patterns	2019-08-29 01:13:41 +00:00
FixedLenDecoderEmitter	[TableGen] Correct the shift to the proper bit width.	2019-08-10 16:15:06 +00:00
GICombinerEmitter	[gicombiner] Add parse failure tests for defs/match	2019-10-25 12:56:49 -07:00
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
address-space-patfrags.td	[GlobalISel] Check LLT size matches memory size for non-truncating stores.	2019-08-02 23:33:13 +00:00
AllowDuplicateRegisterNames.td
ambiguous-composition.td
AnonDefinitionOnDemand.td
arithmetic.td
AsmPredicateCondsEmission.td
AsmVariant.td
BigEncoder.td	Fix compile-time regression caused by rL371928	2019-09-18 18:14:42 +00:00
BitOffsetDecoder.td
BitsInit.td
BitsInitOverflow.td
cast-list-initializer.td
cast-multiclass.td
cast-typeerror.td
cast.td
ClassInstanceValue.td
code.td
compare.td
ConcatenatedSubregs.td
cond-bitlist.td
cond-default.td
cond-empty-list-arg.td
cond-inheritance.td
cond-let.td
cond-list.td
cond-subclass.td
cond-type.td
cond-usage.td
condsbit.td
ConstraintChecking1.td
ConstraintChecking2.td
ConstraintChecking3.td
ConstraintChecking4.td
ConstraintChecking5.td
ConstraintChecking6.td
ConstraintChecking7.td
ConstraintChecking.inc
CStyleComment.td
dag-functional.td
dag-isel-res-order.td
Dag.td
DAGDefaultOps.td
defmclass.td
DefmInherit.td
DefmInsideMultiClass.td
defset-typeerror.td
defset.td
DuplicateFieldValues.td
eq.td
eqbit.td
FastISelEmitter.td
FieldAccess.td
foldl.td
foreach-eval.td
foreach-leak.td
foreach-multiclass.td
foreach-range-parse-errors0.td
foreach-range-parse-errors1.td
foreach-range-parse-errors2.td
foreach-range-parse-errors3.td
foreach-range-parse-errors4.td
foreach-range-parse-errors5.td
foreach-variable-range.td
foreach.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
generic-tables-instruction.td	Update tablegen test after r369847.	2019-08-24 15:11:41 +00:00
generic-tables.td	Update tablegen test after r369847.	2019-08-24 15:11:41 +00:00
get-operand-type.td	[TableGen] Emit OperandType enums for RegisterOperands/RegisterClasses	2019-09-23 18:51:00 +00:00
gisel-physreg-input.td	GlobalISel: Support physical register inputs in patterns	2019-09-06 20:32:37 +00:00
GlobalISelEmitter-PR39045.td	[GlobalISel][NFC] Factor out common target code from GlobalISelEmitterTests	2019-08-13 22:14:37 +00:00
GlobalISelEmitter-setcc.td	GlobalISel/TableGen: Handle setcc patterns	2019-08-29 01:13:41 +00:00
GlobalISelEmitter.td	Use a bit of relaxed constexpr to make FeatureBitset costant intializable	2019-08-24 15:02:44 +00:00
GlobalISelEmitterOverloadedPtr.td	Teach GlobalISelEmitter to treat used iPTRAny operands as pointer operands	2019-08-20 22:04:10 +00:00
GlobalISelEmitterRegSequence.td	GlobalISel/TableGen: Handle REG_SEQUENCE patterns	2019-09-10 17:57:33 +00:00
GlobalISelEmitterSkippedPatterns.td	[GlobalISel][NFC] Factor out common target code from GlobalISelEmitterTests	2019-08-13 22:14:37 +00:00
GlobalISelEmitterSubreg.td	GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints	2019-09-06 00:05:58 +00:00
GlobalISelEmitterVariadic.td	[GlobalISel] Match table opt: fix a bug in matching num of operands	2019-11-01 01:57:48 -07:00
HwModeEncodeDecode.td	[TableGen] Fix crash when using HwModes in CodeEmitterGen	2019-10-09 09:15:34 +00:00
HwModeSelect.td
if-empty-list-arg.td
if-type.td
if.td
ifbit.td
immarg.td	Reapply r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"	2019-09-19 16:26:14 +00:00
Include.inc
Include.td
IntBitInit.td
intrin-side-effects.td	[TableGen] Do not set ReadNone attribute on intrinsics with side effects	2019-07-17 10:53:13 +00:00
intrinsic-long-name.td
intrinsic-pointer-to-any.td
intrinsic-struct.td
intrinsic-varargs.td	[TableGen] Include ValueTypes.td directly into the intrinsic-varargs.td test.	2019-08-21 19:14:38 +00:00
IntSpecialValues.td
InvalidMCSchedClassDesc.td	[TableGen] Fix a bug that MCSchedClassDesc is interfered between different SchedModel	2019-10-11 08:36:54 +00:00
isa.td
JSON-check.py
JSON.td
LazyChange.td
LetInsideMultiClasses.td
lisp.td
list-element-bitref.td
ListArgs.td
ListArgsSimple.td
listconcat.td
ListConversion.td
ListManip.td
ListOfList.td
listpaste.td
ListSlices.td
listsplat.td
lit.local.cfg	Attempt to fix issue with unresolved lit test in TableGen	2019-08-13 22:32:26 +00:00
LoLoL.td
math.td
MultiClass-def-fail.td
MultiClass-defm-fail.td
MultiClass-defm.td
MultiClass.td
MultiClassDefName.td
MultiClassInherit.td
MultiPat.td
name-resolution-consistency.td
nested-comment.td
NestedForeach.td
Paste.td
pr8330.td
prep-diag1.td
prep-diag2.td
prep-diag3.td
prep-diag4.td
prep-diag5.td
prep-diag6.td
prep-diag7.td
prep-diag8.td
prep-diag9.td
prep-diag10.td
prep-diag11-include.inc
prep-diag11.td
prep-diag12-include.inc
prep-diag12.td
prep-diag13.td
prep-diag14.td
prep-ifndef-diag-1.td
prep-ifndef-diag-2.td
prep-ifndef.td
prep-region-include.inc
prep-region-processing.td
RegisterBankEmitter.td
RegisterEncoder.td	[CodeEmitter] Support instruction widths > 64 bits	2019-09-15 08:35:08 +00:00
RelTest.td
SchedModelError.td
searchabletables-intrinsic.td
self-reference-recursion.td
self-reference-typeerror.td
self-reference.td
SetTheory.td
SiblingForeach.td
size.td
Slice.td
strconcat.td
String.td
subst2.td
subst.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
template-arg-dependency.td
TemplateArgRename.td
Tree.td
TreeNames.td
trydecode-emission2.td
trydecode-emission3.td
trydecode-emission.td
TwoLevelName.td
UnsetBitInit.td
unterminated-c-comment-include.inc
unterminated-c-comment.td
unterminated-code-block-include.inc
unterminated-code-block.td
UnterminatedComment.td
usevalname.td
ValidIdentifiers.td