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dcf62df83b
In order to support codegen RV64A, this patch: * Introduces masked atomics intrinsics for atomicrmw operations and cmpxchg that use the i64 type. These are ultimately lowered to masked operations using lr.w/sc.w, but we need to use these alternate intrinsics for RV64 because i32 is not legal * Modifies RISCVExpandPseudoInsts.cpp to handle PseudoAtomicLoadNand64 and PseudoCmpXchg64 * Modifies the AtomicExpandPass hooks in RISCVTargetLowering to sext/trunc as needed for RV64 and to select the i64 intrinsic IDs when necessary * Adds appropriate patterns to RISCVInstrInfoA.td * Updates test/CodeGen/RISCV/atomic-*.ll to show RV64A support This ends up being a fairly mechanical change, as the logic for RV32A is effectively reused. Differential Revision: https://reviews.llvm.org/D53233 llvm-svn: 351422 |
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| .. | ||
| addc-adde-sube-subc.ll | ||
| align.ll | ||
| alloca.ll | ||
| alu8.ll | ||
| alu16.ll | ||
| alu32.ll | ||
| alu64.ll | ||
| analyze-branch.ll | ||
| arith-with-overflow.ll | ||
| atomic-cmpxchg.ll | ||
| atomic-fence.ll | ||
| atomic-load-store.ll | ||
| atomic-rmw.ll | ||
| bare-select.ll | ||
| blockaddress.ll | ||
| branch-relaxation.ll | ||
| branch.ll | ||
| bswap-ctlz-cttz-ctpop.ll | ||
| byval.ll | ||
| calling-conv-rv32f-ilp32.ll | ||
| calling-conv-sext-zext.ll | ||
| calling-conv.ll | ||
| calls.ll | ||
| compress-inline-asm.ll | ||
| compress.ll | ||
| disable-tail-calls.ll | ||
| div.ll | ||
| double-arith.ll | ||
| double-br-fcmp.ll | ||
| double-calling-conv.ll | ||
| double-convert.ll | ||
| double-fcmp.ll | ||
| double-frem.ll | ||
| double-imm.ll | ||
| double-intrinsics.ll | ||
| double-mem.ll | ||
| double-previous-failure.ll | ||
| double-select-fcmp.ll | ||
| double-stack-spill-restore.ll | ||
| fixups-diff.ll | ||
| fixups-relax-diff.ll | ||
| float-arith.ll | ||
| float-br-fcmp.ll | ||
| float-convert.ll | ||
| float-fcmp.ll | ||
| float-frem.ll | ||
| float-imm.ll | ||
| float-intrinsics.ll | ||
| float-mem.ll | ||
| float-select-fcmp.ll | ||
| flt-rounds.ll | ||
| fp128.ll | ||
| frame.ll | ||
| frameaddr-returnaddr.ll | ||
| get-setcc-result-type.ll | ||
| hoist-global-addr-base.ll | ||
| i32-icmp.ll | ||
| imm-cse.ll | ||
| imm.ll | ||
| indirectbr.ll | ||
| init-array.ll | ||
| inline-asm.ll | ||
| interrupt-attr-args-error.ll | ||
| interrupt-attr-invalid.ll | ||
| interrupt-attr-nocall.ll | ||
| interrupt-attr-ret-error.ll | ||
| interrupt-attr.ll | ||
| jumptable.ll | ||
| large-stack.ll | ||
| lit.local.cfg | ||
| lsr-legaladdimm.ll | ||
| mem64.ll | ||
| mem.ll | ||
| mul.ll | ||
| musttail-call.ll | ||
| option-norelax.ll | ||
| option-norvc.ll | ||
| option-relax.ll | ||
| option-rvc.ll | ||
| prefetch.ll | ||
| rem.ll | ||
| remat.ll | ||
| rotl-rotr.ll | ||
| rv64i-exhaustive-w-insts.ll | ||
| rv64i-tricky-shifts.ll | ||
| rv64m-exhaustive-w-insts.ll | ||
| select-cc.ll | ||
| sext-zext-trunc.ll | ||
| shift-masked-shamt.ll | ||
| shifts.ll | ||
| tail-calls.ll | ||
| umulo-128-legalisation-lowering.ll | ||
| vararg.ll | ||
| wide-mem.ll | ||
| zext-with-load-is-free.ll | ||