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9cf9511d2e
llvm-mirror/lib/Target/AMDGPU
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Stanislav Mekhanoshin 9cf9511d2e [AMDGPU] Untangle SDWA pass from SIShrinkInstructions 
Remove dependency of SDWA pass on SIShrinkInstructions.
The goal is to move SDWA even higher in the stack to avoid second run
of MachineLICM, MachineCSE and SIFoldOperands.

Also added handling to preserve original src modifiers.

Differential Revision: https://reviews.llvm.org/D33860

llvm-svn: 304665
2017-06-03 17:39:47 +00:00
..
AsmParser [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
Disassembler [AMDGPU] SDWA: add disassembler support for GFX9 2017-05-26 15:52:00 +00:00
InstPrinter [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
MCTargetDesc [AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes 2017-05-26 18:01:29 +00:00
TargetInfo Move the global variables representing each Target behind accessor function 2016-10-09 23:00:34 +00:00
Utils [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
AMDGPU.h AMDGPU: Register AMDGPUAlwaysInline 2017-06-02 18:02:42 +00:00
AMDGPU.td AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
AMDGPUAliasAnalysis.cpp [IR] Make getParamAttributes take argument numbers, not ArgNo+1 2017-04-13 23:12:13 +00:00
AMDGPUAliasAnalysis.h AMDGPU/R600: Fix amdgpu alias analysis pass. 2017-03-31 19:26:23 +00:00
AMDGPUAlwaysInlinePass.cpp AMDGPU: Register AMDGPUAlwaysInline 2017-06-02 18:02:42 +00:00
AMDGPUAnnotateKernelFeatures.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
AMDGPUAnnotateUniformValues.cpp [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUAsmPrinter.cpp AMDGPU: Remove error on call in AsmPrinter 2017-06-01 15:05:15 +00:00
AMDGPUAsmPrinter.h AMDGPU: Refactor AsmPrinter 2017-05-02 17:14:00 +00:00
AMDGPUCallingConv.td AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUCallLowering.cpp [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUCallLowering.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUCodeGenPrepare.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
AMDGPUFrameLowering.cpp [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
AMDGPUFrameLowering.h [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
AMDGPUGenRegisterBankInfo.def Re-commit AMDGPU/GlobalISel: Add support for simple shaders 2017-01-30 21:56:46 +00:00
AMDGPUInstrInfo.cpp [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUInstrInfo.h AMDGPU: Fix crash when disassembling VOP3 mac 2017-04-10 17:58:06 +00:00
AMDGPUInstrInfo.td AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUInstructions.td [AMDGPU][MC] Added check for truncation of SOPK imm operand 2017-04-26 15:34:19 +00:00
AMDGPUInstructionSelector.cpp AMDGPU: Remove tfe bit from flat instruction definitions 2017-05-11 17:38:33 +00:00
AMDGPUInstructionSelector.h [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUIntrinsicInfo.cpp Rename AttributeSet to AttributeList 2017-03-21 16:57:19 +00:00
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td AMDGPU: Remove legacy bfe intrinsics 2017-04-03 18:08:08 +00:00
AMDGPUISelDAGToDAG.cpp Revert "AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patterns" 2017-05-24 14:53:50 +00:00
AMDGPUISelLowering.cpp [AMDGPU] Combine and (srl) into shl (bfe) 2017-05-23 19:54:48 +00:00
AMDGPUISelLowering.h [AMDGPU] Convert shl (add) into add (shl) 2017-05-23 15:59:58 +00:00
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Mark 1-bit integer constants as legal 2017-06-03 01:13:33 +00:00
AMDGPULegalizerInfo.h Re-commit AMDGPU/GlobalISel: Add support for simple shaders 2017-01-30 21:56:46 +00:00
AMDGPULowerIntrinsics.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
AMDGPUMachineCFGStructurizer.cpp AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable] 2017-05-16 04:01:23 +00:00
AMDGPUMachineFunction.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUMachineFunction.h AMDGPU: Rename isKernel 2017-03-30 23:58:04 +00:00
AMDGPUMCInstLower.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPUMCInstLower.h Reapply "AMDGPU: Support using tablegened MC pseudo expansions" 2016-10-06 17:19:11 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
AMDGPUPromoteAlloca.cpp AMDGPU/SI: Move the local memory usage related checking after calling convention checking in PromoteAlloca 2017-05-23 20:25:41 +00:00
AMDGPUPTNote.h [AMDGPU] Restructure code object metadata creation 2017-03-22 22:32:22 +00:00
AMDGPURegisterBankInfo.cpp [RegisterBankInfo] Uniquely allocate instruction mapping. 2017-05-05 22:48:22 +00:00
AMDGPURegisterBankInfo.h [RegisterBankInfo] Uniquely allocate instruction mapping. 2017-05-05 22:48:22 +00:00
AMDGPURegisterBanks.td Re-commit AMDGPU/GlobalISel: Add support for simple shaders 2017-01-30 21:56:46 +00:00
AMDGPURegisterInfo.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
AMDGPUSubtarget.h AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
AMDGPUTargetMachine.cpp [AMDGPU] Untangle SDWA pass from SIShrinkInstructions 2017-06-03 17:39:47 +00:00
AMDGPUTargetMachine.h TargetMachine: Indicate whether machine verifier passes. 2017-05-31 18:41:23 +00:00
AMDGPUTargetObjectFile.cpp [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUTargetObjectFile.h [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU: Make some packed shuffles free 2017-05-10 21:29:33 +00:00
AMDGPUTargetTransformInfo.h AMDGPU: Make some packed shuffles free 2017-05-10 21:29:33 +00:00
AMDGPUUnifyDivergentExitNodes.cpp AMDGPU: Unify divergent function exits. 2017-03-24 19:52:05 +00:00
AMDGPUUnifyMetadata.cpp [AMDGPU] Turn AMDGPUUnifyMetadata back into module pass 2017-01-27 16:38:10 +00:00
AMDILCFGStructurizer.cpp Remove unused functions. Remove static qualifier from functions in header files. NFC. 2017-04-11 14:55:32 +00:00
AMDKernelCodeT.h
BUFInstructions.td AMDGPU: Change mubuf soffset register when SP relative 2017-05-17 21:02:58 +00:00
CaymanInstructions.td
CIInstructions.td
CMakeLists.txt Re-submit AMDGPUMachineCFGStructurizer. 2017-05-15 20:18:37 +00:00
DSInstructions.td [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
EvergreenInstructions.td AMDGPU: Fix unnecessary ands when packing f16 vectors 2017-03-15 19:04:26 +00:00
FLATInstructions.td AMDGPU: Remove tfe bit from flat instruction definitions 2017-05-11 17:38:33 +00:00
GCNHazardRecognizer.cpp AMDGPU: Fix broken condition in hazard recognizer 2017-03-17 21:36:28 +00:00
GCNHazardRecognizer.h AMDGPU: Fix broken condition in hazard recognizer 2017-03-17 21:36:28 +00:00
GCNIterativeScheduler.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNIterativeScheduler.h [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler 2017-03-21 13:15:46 +00:00
GCNMinRegStrategy.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.cpp Make helper functions static. NFC. 2017-05-26 20:09:00 +00:00
GCNRegPressure.h [AMDGPU] Fix incorrect register usage tracking in GCNUpwardTracker 2017-05-22 13:09:40 +00:00
GCNSchedStrategy.cpp [AMDGPU] Use GCNRPTracker dumper methods in scheduler 2017-05-16 16:31:45 +00:00
GCNSchedStrategy.h [AMDGPU] Cache live-ins and register pressure in scheduler 2017-05-16 16:11:26 +00:00
LLVMBuild.txt AMDGPU: Add GlobalISel to required_libraries. 2017-01-28 18:13:08 +00:00
MIMGInstructions.td AMDGPU: Remove legacy image intrinsics 2017-04-04 16:34:35 +00:00
Processors.td AMDGPU: Merge initial gfx9 support 2017-02-18 18:29:53 +00:00
R600ClauseMergePass.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600ControlFlowFinalizer.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp AMDGPU/R600: Fix ALU clause markers use detection 2017-03-06 20:10:05 +00:00
R600ExpandSpecialInstrs.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600FrameLowering.cpp [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
R600FrameLowering.h [AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI 2017-03-10 19:39:07 +00:00
R600InstrFormats.td
R600InstrInfo.cpp Cyle -> Cycle; NFCI 2017-03-15 15:37:42 +00:00
R600InstrInfo.h Cyle -> Cycle; NFCI 2017-03-15 15:37:42 +00:00
R600Instructions.td [AMDGPU] Get address space mapping by target triple environment 2017-03-27 14:04:01 +00:00
R600Intrinsics.td AMDGPU: Make intrinsics speculatable 2017-05-02 16:57:44 +00:00
R600ISelLowering.cpp [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. 2017-05-24 15:59:09 +00:00
R600ISelLowering.h [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. 2017-05-24 15:59:09 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
R600OptimizeVectorRegisters.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600Packetizer.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
R600RegisterInfo.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
R600RegisterInfo.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
R600RegisterInfo.td [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045) 2017-05-23 21:27:15 +00:00
R600Schedule.td
R700Instructions.td
SIAnnotateControlFlow.cpp Remove now useless trailing nullptr in StructType::get 2017-05-11 08:46:02 +00:00
SIDebuggerInsertNops.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SIDefines.h [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
SIFixControlFlowLiveIntervals.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SIFixSGPRCopies.cpp AMDGPU: Fix copies from physical registers in SIFixSGPRCopies 2017-04-29 01:26:34 +00:00
SIFixVGPRCopies.cpp [AMDGPU] Add VGPR copies post regalloc fix pass 2017-01-24 17:46:17 +00:00
SIFoldOperands.cpp [AMDGPU] Preserve operand order in SIFoldOperands 2017-06-03 00:41:52 +00:00
SIFrameLowering.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIFrameLowering.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIInsertSkips.cpp AMDGPU: Rename SI_RETURN 2017-03-21 22:18:10 +00:00
SIInsertWaitcnts.cpp AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
SIInsertWaits.cpp AMDGPU: Make auto waitcnt before barrier a feature 2017-06-02 17:40:26 +00:00
SIInstrFormats.td [AMDGPU][MC] Fixed bugs in export instruction 2017-05-19 13:36:09 +00:00
SIInstrInfo.cpp AMDGPU/GlobalISel: Mark 32-bit float constants as legal 2017-05-26 16:40:03 +00:00
SIInstrInfo.h Re-submit AMDGPUMachineCFGStructurizer. 2017-05-15 20:18:37 +00:00
SIInstrInfo.td [AMDGPU][MC] New syntax for ds_swizzle_b32 offset 2017-05-31 16:26:47 +00:00
SIInstructions.td Re-submit AMDGPUMachineCFGStructurizer. 2017-05-15 20:18:37 +00:00
SIIntrinsics.td AMDGPU: Remove legacy export intrinsic 2017-04-04 16:34:39 +00:00
SIISelLowering.cpp AMDGPUAnnotateUniformValue should always treat volatile loads as divergent 2017-06-02 15:25:52 +00:00
SIISelLowering.h [AMDGPU] Prevent too large store merges in AMDGPU Subtargets. NFCI. 2017-05-24 15:59:09 +00:00
SILoadStoreOptimizer.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
SILowerControlFlow.cpp [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-20 17:52:16 +00:00
SILowerI1Copies.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SIMachineFunctionInfo.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIMachineFunctionInfo.h AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIMachineScheduler.cpp [AMDGPU] Update SI scheduler colorHighLatenciesGroups 2017-03-28 07:19:48 +00:00
SIMachineScheduler.h [AMDGPU] Update SI scheduler colorHighLatenciesGroups 2017-03-28 07:19:48 +00:00
SIOptimizeExecMasking.cpp AMDGPU: Fix use-after-free in SIOptimizeExecMasking 2016-10-07 08:40:14 +00:00
SIPeepholeSDWA.cpp [AMDGPU] Untangle SDWA pass from SIShrinkInstructions 2017-06-03 17:39:47 +00:00
SIRegisterInfo.cpp AMDGPU: Start defining a calling convention 2017-05-17 21:56:25 +00:00
SIRegisterInfo.h AMDGPU: Set high getCSRFirstUseCost 2017-06-01 14:38:02 +00:00
SIRegisterInfo.td AMDGPU: Fix not including v2i16/v2f16 in register class 2017-03-21 16:42:50 +00:00
SISchedule.td AMDGPU: Implement early ifcvt target hooks. 2017-01-25 04:25:02 +00:00
SIShrinkInstructions.cpp [CodeGen] Rename MachineInstrBuilder::addOperand. NFC 2017-01-13 09:58:52 +00:00
SITypeRewriter.cpp Use StringRef in Pass/PassManager APIs (NFC) 2016-10-01 02:56:57 +00:00
SIWholeQuadMode.cpp [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2016-12-09 22:06:55 +00:00
SMInstructions.td AMDGPUAnnotateUniformValue should always treat volatile loads as divergent 2017-06-02 15:25:52 +00:00
SOPInstructions.td Resubmit r303859 with test fixed. 2017-05-26 20:38:26 +00:00
VIInstrFormats.td
VIInstructions.td AMDGPU: Add VI i16 support 2016-11-10 16:02:37 +00:00
VOP1Instructions.td [AMDGPU] SDWA: Add assembler support for GFX9 2017-05-23 10:08:55 +00:00
VOP2Instructions.td [AMDGPU] SDWA: Add assembler support for GFX9 2017-05-23 10:08:55 +00:00
VOP3Instructions.td [AMDGPU] V_DIV_FIXUP_F16 is not a commutable operation 2017-06-03 00:16:44 +00:00
VOP3PInstructions.td AMDGPU: Support v2i16/v2f16 packed operations 2017-02-27 22:15:25 +00:00
VOPCInstructions.td [AMDGPU] SDWA: Add assembler support for GFX9 2017-05-23 10:08:55 +00:00
VOPInstructions.td [AMDGPU] SDWA: Add assembler support for GFX9 2017-05-23 10:08:55 +00:00