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AsmParser
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std::isspace -> llvm::isSpace (where locale should be ignored)
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2020-05-02 15:36:04 +02:00 |
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Disassembler
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[Hexagon] v67+ HVX register pairs should support either direction
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2020-02-14 12:43:43 -06:00 |
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MCTargetDesc
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HexagonShuffler.h - remove duplicate STLExtras.h include. NFC.
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2020-04-24 13:27:56 +01:00 |
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TargetInfo
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BitTracker.cpp
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BitTracker.h
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CMakeLists.txt
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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Hexagon.h
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Hexagon.td
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[TableGen] Support combining AssemblerPredicates with ORs
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2020-03-13 17:13:51 +00:00 |
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HexagonArch.h
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HexagonAsmPrinter.cpp
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[MCStreamer] De-capitalize EmitValue EmitIntValue{,InHex}
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2020-02-14 23:08:40 -08:00 |
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HexagonAsmPrinter.h
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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HexagonBitSimplify.cpp
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HexagonBitTracker.cpp
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[Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign()
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2020-04-01 14:08:28 +00:00 |
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HexagonBitTracker.h
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HexagonBlockRanges.cpp
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HexagonBlockRanges.h
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HexagonBranchRelaxation.cpp
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HexagonCallingConv.td
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HexagonCFGOptimizer.cpp
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HexagonCommonGEP.cpp
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Remove SequentialType from the type heirarchy.
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2020-04-06 17:03:49 -07:00 |
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HexagonConstExtenders.cpp
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HexagonConstPropagation.cpp
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HexagonCopyToCombine.cpp
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[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
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2020-04-26 12:58:20 +01:00 |
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HexagonDepArch.h
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HexagonDepArch.td
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[TableGen] Support combining AssemblerPredicates with ORs
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2020-03-13 17:13:51 +00:00 |
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HexagonDepDecoders.inc
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HexagonDepIICHVX.td
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HexagonDepIICScalar.td
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HexagonDepInstrFormats.td
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HexagonDepInstrInfo.td
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HexagonDepITypes.h
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HexagonDepITypes.td
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HexagonDepMapAsm2Intrin.td
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[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
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2020-04-25 16:26:45 -07:00 |
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HexagonDepMappings.td
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HexagonDepMask.h
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HexagonDepOperands.td
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HexagonDepTimingClasses.h
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HexagonEarlyIfConv.cpp
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HexagonExpandCondsets.cpp
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HexagonFixupHwLoops.cpp
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[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
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2020-04-26 12:58:20 +01:00 |
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HexagonFrameLowering.cpp
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CodeGen: Use Register in TargetFrameLowering
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2020-04-07 17:07:44 -04:00 |
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HexagonFrameLowering.h
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CodeGen: Use Register in TargetFrameLowering
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2020-04-07 17:07:44 -04:00 |
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HexagonGenExtract.cpp
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HexagonGenInsert.cpp
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HexagonGenMux.cpp
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HexagonGenPredicate.cpp
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HexagonHardwareLoops.cpp
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CodeGen: Convert some TII hooks to use Register
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2020-04-03 14:52:54 -04:00 |
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HexagonHazardRecognizer.cpp
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HexagonHazardRecognizer.h
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HexagonIICHVX.td
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HexagonIICScalar.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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HexagonInstrFormats.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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HexagonInstrFormatsV60.td
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HexagonInstrFormatsV65.td
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[llvm] NFC: Fix trivial typo in rst and td files
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2020-04-23 14:26:32 +09:00 |
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HexagonInstrInfo.cpp
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std::isspace -> llvm::isSpace (where locale should be ignored)
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2020-05-02 15:36:04 +02:00 |
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HexagonInstrInfo.h
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CodeGen: Convert some TII hooks to use Register
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2020-04-03 14:52:54 -04:00 |
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HexagonIntrinsics.td
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[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
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2020-04-25 16:26:45 -07:00 |
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HexagonIntrinsicsV5.td
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HexagonIntrinsicsV60.td
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[Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1
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2020-02-19 14:14:56 -06:00 |
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HexagonISelDAGToDAG.cpp
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[Alignment][NFC] Deprecate getMaxAlignment
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2020-03-18 14:48:45 +01:00 |
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HexagonISelDAGToDAG.h
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[Hexagon] Remove unused forward declarations. NFC.
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2020-04-22 18:26:50 +01:00 |
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HexagonISelDAGToDAGHVX.cpp
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[Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1
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2020-02-19 14:14:56 -06:00 |
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HexagonISelLowering.cpp
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Handle part-word LL/SC in atomic expansion pass
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2020-04-28 10:07:39 -05:00 |
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HexagonISelLowering.h
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CodeGen: Use Register in TargetLowering
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2020-04-08 12:10:58 -04:00 |
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HexagonISelLoweringHVX.cpp
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[Hexagon] Fix result word order when bitcasting vector pred to int64/128
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2020-04-23 19:15:11 -05:00 |
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HexagonLoopIdiomRecognition.cpp
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HexagonMachineFunctionInfo.cpp
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HexagonMachineFunctionInfo.h
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HexagonMachineScheduler.cpp
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HexagonMachineScheduler.h
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HexagonMapAsm2IntrinV62.gen.td
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HexagonMapAsm2IntrinV65.gen.td
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HexagonMCInstLower.cpp
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[Hexagon][NFC] Rename VK_Hexagon_PCREL to VK_PCREL
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2020-02-19 09:52:58 -06:00 |
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HexagonNewValueJump.cpp
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HexagonOperands.td
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HexagonOptAddrMode.cpp
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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HexagonOptimizeSZextends.cpp
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HexagonPatterns.td
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[Hexagon] Fix fshl/fshr -> combine() bug identified in D75114
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2020-03-06 17:23:10 +00:00 |
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HexagonPatternsHVX.td
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HexagonPatternsV65.td
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HexagonPeephole.cpp
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[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
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2020-04-26 12:58:20 +01:00 |
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HexagonPseudo.td
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[TableGen] Drop deprecated leading # operation (NOP) and replace ## with #
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2020-04-25 16:26:45 -07:00 |
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HexagonRDFOpt.cpp
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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HexagonRegisterInfo.cpp
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CodeGen: Use Register in TargetFrameLowering
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2020-04-07 17:07:44 -04:00 |
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HexagonRegisterInfo.h
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HexagonRegisterInfo.td
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[Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1
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2020-02-19 14:14:56 -06:00 |
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HexagonSchedule.td
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HexagonScheduleV5.td
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HexagonScheduleV55.td
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HexagonScheduleV60.td
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HexagonScheduleV62.td
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HexagonScheduleV65.td
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HexagonScheduleV66.td
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HexagonScheduleV67.td
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HexagonScheduleV67T.td
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HexagonSelectionDAGInfo.cpp
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HexagonSelectionDAGInfo.h
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HexagonSplitConst32AndConst64.cpp
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HexagonSplitDouble.cpp
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CodeGen: Convert some TII hooks to use Register
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2020-04-03 14:52:54 -04:00 |
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HexagonStoreWidening.cpp
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[Alignment][NFC] Use Align version of getMachineMemOperand
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2020-03-30 15:46:27 +00:00 |
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HexagonSubtarget.cpp
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Handle cases for subregisters.
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2020-04-30 20:32:33 -05:00 |
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HexagonSubtarget.h
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Provide operand indices to adjustSchedDependency
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2020-04-17 11:08:44 +01:00 |
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HexagonTargetMachine.cpp
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HexagonTargetMachine.h
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HexagonTargetObjectFile.cpp
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[Hexagon] Silence warning
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2020-04-22 18:57:08 +02:00 |
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HexagonTargetObjectFile.h
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HexagonTargetStreamer.h
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[MC] De-capitalize another set of MCStreamer::Emit* functions
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2020-02-14 19:26:52 -08:00 |
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HexagonTargetTransformInfo.cpp
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[TTI] Add DemandedElts to getScalarizationOverhead
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2020-04-29 12:00:38 +01:00 |
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HexagonTargetTransformInfo.h
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[TTI] Add DemandedElts to getScalarizationOverhead
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2020-04-29 12:00:38 +01:00 |
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HexagonVectorLoopCarriedReuse.cpp
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HexagonVectorPrint.cpp
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[Hexagon] v67+ HVX register pairs should support either direction
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2020-02-14 12:43:43 -06:00 |
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HexagonVExtract.cpp
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[Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly
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2020-04-26 12:58:20 +01:00 |
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HexagonVLIWPacketizer.cpp
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[MC] Widen the functional unit type from 32 to 64 bits.
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2020-02-24 09:37:00 +01:00 |
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HexagonVLIWPacketizer.h
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LLVMBuild.txt
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RDFCopy.cpp
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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RDFCopy.h
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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RDFDeadCode.cpp
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
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RDFDeadCode.h
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Move RDF from Hexagon to Codegen
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2020-03-17 12:43:14 -07:00 |
