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llvm-mirror/lib/Target/AArch64
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Saleem Abdulrasool f5d9036758 AArch64: support .cpu directive 
Add support for the AArch64 .cpu directive.  This is a slightly involved
directive since the parameter is actually a variable encoded string.  The
general structure is:

  <cpu>[[+-]<feature>]*

We now map some of the supported string names for features for internal
representation of feature flags.  If we encounter one which we do not support,
bail out as we cannot validate the assembly any longer.

Resolves PR27010.

llvm-svn: 265240
2016-04-02 19:29:52 +00:00
..
AsmParser AArch64: support .cpu directive 2016-04-02 19:29:52 +00:00
Disassembler Remove autoconf support 2016-01-26 21:29:08 +00:00
InstPrinter Remove autoconf support 2016-01-26 21:29:08 +00:00
MCTargetDesc [AArch64] Better errors for out-of-range fixups 2016-04-01 09:14:50 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils Remove autoconf support 2016-01-26 21:29:08 +00:00
AArch64.h AArch64: avoid clobbering SP for dead MOVimm pseudos. 2016-04-01 23:14:52 +00:00
AArch64.td AArch64: remove CRC feature from Cyclone. 2016-02-24 18:10:17 +00:00
AArch64A53Fix835769.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64A57FPLoadBalancing.cpp [AArch64] Slight cleanup in FPLoadBalancing 2016-02-26 09:10:53 +00:00
AArch64AddressTypePromotion.cpp Simplify some boolean conditional return statements in AArch64. 2016-02-29 22:50:49 +00:00
AArch64AdvSIMDScalarPass.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64AsmPrinter.cpp Clean up redundant copies of Triple objects. NFC 2015-06-16 15:44:21 +00:00
AArch64BranchRelaxation.cpp [AArch64] Fix typo. NFC. 2016-03-25 14:37:43 +00:00
AArch64CallingConvention.h Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td Swift Calling Convention: add swiftself attribute. 2016-03-29 17:37:21 +00:00
AArch64CallLowering.cpp [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code. 2016-02-16 19:26:02 +00:00
AArch64CallLowering.h [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code. 2016-02-16 19:26:02 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC" 2016-02-22 20:49:58 +00:00
AArch64CollectLOH.cpp [AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it. 2015-08-31 19:02:00 +00:00
AArch64ConditionalCompares.cpp WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFC 2016-02-27 17:05:33 +00:00
AArch64ConditionOptimizer.cpp Fix AArch64ConditionOptimizer 2016-01-15 00:06:58 +00:00
AArch64DeadRegisterDefinitionsPass.cpp [AArch64] Fix a typo. NFC. 2016-04-01 17:34:38 +00:00
AArch64ExpandPseudoInsts.cpp AArch64: avoid clobbering SP for dead MOVimm pseudos. 2016-04-01 23:14:52 +00:00
AArch64FastISel.cpp Swift Calling Convention: add swiftself attribute. 2016-03-29 17:37:21 +00:00
AArch64FrameLowering.cpp Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
AArch64FrameLowering.h Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64InstrInfo.cpp [AArch64] Allow loads with imp-def to be handled in getMemOpBaseRegImmOfsWidth() 2016-03-31 20:53:47 +00:00
AArch64InstrInfo.h [AArch64] Enable more load clustering in the MI Scheduler. 2016-03-18 19:21:02 +00:00
AArch64InstrInfo.td AArch64: remove pseudo-instructions used only for their patterns. 2016-03-10 18:46:12 +00:00
AArch64ISelDAGToDAG.cpp Simplify some boolean conditional return statements in AArch64. 2016-02-29 22:50:49 +00:00
AArch64ISelLowering.cpp AArch64ISelLowering: Remove unused variables/arguments; NFC 2016-04-01 02:49:17 +00:00
AArch64ISelLowering.h AArch64ISelLowering: Remove unused variables/arguments; NFC 2016-04-01 02:49:17 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Handle missing store pair opportunity 2016-03-31 14:47:24 +00:00
AArch64MachineFunctionInfo.h [AArch64] Break the dependency between FP and SP when possible. 2016-03-14 18:17:41 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.cpp CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 2016-02-27 06:40:41 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Fix -Wdocumentation warnings from r263853 2016-03-21 22:13:44 +00:00
AArch64RedundantCopyElimination.cpp AArch64: Use MachineInstr& in guaranteesZeroRegInBlock(), NFC 2016-02-27 19:12:54 +00:00
AArch64RegisterInfo.cpp Add support for a preserve_most calling convention to the AArch64 backend. 2016-03-10 04:35:09 +00:00
AArch64RegisterInfo.h CXX_FAST_TLS calling convention: performance improvement for AArch64. 2015-12-16 21:04:19 +00:00
AArch64RegisterInfo.td [AArch64] Add ARMv8.2-A FP16 vector instructions 2015-12-08 12:16:10 +00:00
AArch64SchedA53.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedA57.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SchedKryo.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedKryoDetails.td [AArch64] Add support for Qualcomm Kryo CPU. 2016-02-12 15:51:51 +00:00
AArch64SchedM1.td [AArch64] Minor reformatting (NFC). 2016-03-09 19:56:38 +00:00
AArch64Schedule.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SelectionDAGInfo.cpp Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64SelectionDAGInfo.h Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/ 2016-01-27 16:32:26 +00:00
AArch64StorePairSuppress.cpp [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC. 2016-03-09 16:00:35 +00:00
AArch64Subtarget.cpp [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code. 2016-02-16 19:26:02 +00:00
AArch64Subtarget.h [GlobalISel] Re-apply r260922-260923 with MSVC-friendly code. 2016-02-16 19:26:02 +00:00
AArch64TargetMachine.cpp AArch64: avoid clobbering SP for dead MOVimm pseudos. 2016-04-01 23:14:52 +00:00
AArch64TargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp [LoopDataPrefetch] Centralize the tuning cl::opts under the pass 2016-03-29 23:45:52 +00:00
AArch64TargetTransformInfo.h [LoopDataPrefetch] Add TTI to limit the number of iterations to prefetch ahead 2016-03-18 00:27:43 +00:00
CMakeLists.txt [AArch64] Add pass to remove redundant copy after RA 2016-02-16 20:02:39 +00:00
LLVMBuild.txt [AArch64] Plug the beginning of the GlobalISel pipeline. 2016-02-11 19:35:06 +00:00