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fd94b72c2e
PseudoBRIND had seemingly inherited incorrect annotations denoting it as a call instruction and that it defines X1/ra. This caused excess save/restore code to be emitted for ra. Differential Revision: https://reviews.llvm.org/D86286
150 lines
4.9 KiB
LLVM
150 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+f -code-model=small -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I-SMALL
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; RUN: llc -mtriple=riscv32 -mattr=+f -code-model=medium -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I-MEDIUM
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; Check lowering of globals
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@G = global i32 0
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define i32 @lower_global(i32 %a) nounwind {
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; RV32I-SMALL-LABEL: lower_global:
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; RV32I-SMALL: # %bb.0:
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; RV32I-SMALL-NEXT: lui a0, %hi(G)
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; RV32I-SMALL-NEXT: lw a0, %lo(G)(a0)
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; RV32I-SMALL-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: lower_global:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: .LBB0_1: # Label of block must be emitted
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; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(G)
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; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
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; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
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; RV32I-MEDIUM-NEXT: ret
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%1 = load volatile i32, i32* @G
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ret i32 %1
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}
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; Check lowering of blockaddresses
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@addr = global i8* null
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define void @lower_blockaddress() nounwind {
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; RV32I-SMALL-LABEL: lower_blockaddress:
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; RV32I-SMALL: # %bb.0:
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; RV32I-SMALL-NEXT: lui a0, %hi(addr)
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; RV32I-SMALL-NEXT: addi a1, zero, 1
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; RV32I-SMALL-NEXT: sw a1, %lo(addr)(a0)
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; RV32I-SMALL-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: lower_blockaddress:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: .LBB1_1: # Label of block must be emitted
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; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(addr)
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; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
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; RV32I-MEDIUM-NEXT: addi a1, zero, 1
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; RV32I-MEDIUM-NEXT: sw a1, 0(a0)
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; RV32I-MEDIUM-NEXT: ret
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store volatile i8* blockaddress(@lower_blockaddress, %block), i8** @addr
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ret void
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block:
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unreachable
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}
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; Check lowering of blockaddress that forces a displacement to be added
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define signext i32 @lower_blockaddress_displ(i32 signext %w) nounwind {
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; RV32I-SMALL-LABEL: lower_blockaddress_displ:
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; RV32I-SMALL: # %bb.0: # %entry
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; RV32I-SMALL-NEXT: addi sp, sp, -16
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; RV32I-SMALL-NEXT: lui a1, %hi(.Ltmp0)
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; RV32I-SMALL-NEXT: addi a1, a1, %lo(.Ltmp0)
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; RV32I-SMALL-NEXT: addi a2, zero, 101
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; RV32I-SMALL-NEXT: sw a1, 8(sp)
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; RV32I-SMALL-NEXT: blt a0, a2, .LBB2_3
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; RV32I-SMALL-NEXT: # %bb.1: # %if.then
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; RV32I-SMALL-NEXT: lw a0, 8(sp)
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; RV32I-SMALL-NEXT: jr a0
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; RV32I-SMALL-NEXT: .Ltmp0: # Block address taken
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; RV32I-SMALL-NEXT: .LBB2_2: # %return
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; RV32I-SMALL-NEXT: addi a0, zero, 4
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; RV32I-SMALL-NEXT: addi sp, sp, 16
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; RV32I-SMALL-NEXT: ret
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; RV32I-SMALL-NEXT: .LBB2_3: # %return.clone
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; RV32I-SMALL-NEXT: addi a0, zero, 3
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; RV32I-SMALL-NEXT: addi sp, sp, 16
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; RV32I-SMALL-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: lower_blockaddress_displ:
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; RV32I-MEDIUM: # %bb.0: # %entry
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; RV32I-MEDIUM-NEXT: addi sp, sp, -16
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; RV32I-MEDIUM-NEXT: .LBB2_4: # %entry
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; RV32I-MEDIUM-NEXT: # Label of block must be emitted
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; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.Ltmp0)
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; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_4)
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; RV32I-MEDIUM-NEXT: addi a2, zero, 101
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; RV32I-MEDIUM-NEXT: sw a1, 8(sp)
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; RV32I-MEDIUM-NEXT: blt a0, a2, .LBB2_3
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; RV32I-MEDIUM-NEXT: # %bb.1: # %if.then
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; RV32I-MEDIUM-NEXT: lw a0, 8(sp)
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; RV32I-MEDIUM-NEXT: jr a0
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; RV32I-MEDIUM-NEXT: .Ltmp0: # Block address taken
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; RV32I-MEDIUM-NEXT: .LBB2_2: # %return
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; RV32I-MEDIUM-NEXT: addi a0, zero, 4
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; RV32I-MEDIUM-NEXT: addi sp, sp, 16
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; RV32I-MEDIUM-NEXT: ret
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; RV32I-MEDIUM-NEXT: .LBB2_3: # %return.clone
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; RV32I-MEDIUM-NEXT: addi a0, zero, 3
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; RV32I-MEDIUM-NEXT: addi sp, sp, 16
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; RV32I-MEDIUM-NEXT: ret
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entry:
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%x = alloca i8*, align 8
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store i8* blockaddress(@lower_blockaddress_displ, %test_block), i8** %x, align 8
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%cmp = icmp sgt i32 %w, 100
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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%addr = load i8*, i8** %x, align 8
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br label %indirectgoto
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if.end:
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br label %return
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test_block:
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br label %return
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return:
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%retval = phi i32 [ 3, %if.end ], [ 4, %test_block ]
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ret i32 %retval
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indirectgoto:
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indirectbr i8* %addr, [ label %test_block ]
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}
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; Check lowering of constantpools
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define float @lower_constantpool(float %a) nounwind {
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; RV32I-SMALL-LABEL: lower_constantpool:
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; RV32I-SMALL: # %bb.0:
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; RV32I-SMALL-NEXT: lui a1, %hi(.LCPI3_0)
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; RV32I-SMALL-NEXT: flw ft0, %lo(.LCPI3_0)(a1)
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; RV32I-SMALL-NEXT: fmv.w.x ft1, a0
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; RV32I-SMALL-NEXT: fadd.s ft0, ft1, ft0
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; RV32I-SMALL-NEXT: fmv.x.w a0, ft0
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; RV32I-SMALL-NEXT: ret
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;
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; RV32I-MEDIUM-LABEL: lower_constantpool:
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; RV32I-MEDIUM: # %bb.0:
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; RV32I-MEDIUM-NEXT: .LBB3_1: # Label of block must be emitted
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; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(.LCPI3_0)
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; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB3_1)
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; RV32I-MEDIUM-NEXT: flw ft0, 0(a1)
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; RV32I-MEDIUM-NEXT: fmv.w.x ft1, a0
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; RV32I-MEDIUM-NEXT: fadd.s ft0, ft1, ft0
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; RV32I-MEDIUM-NEXT: fmv.x.w a0, ft0
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; RV32I-MEDIUM-NEXT: ret
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%1 = fadd float %a, 1.0
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ret float %1
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}
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