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llvm-mirror/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
Alexander Timofeev dd292a30dc [AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.'
Detailed description:

    After https://reviews.llvm.org/D59990 submit several issues were discovered.
    Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly.

    Discovered issues were addressed in the following commits:

    https://reviews.llvm.org/D67662
    https://reviews.llvm.org/D67101
    https://reviews.llvm.org/D63953
    https://reviews.llvm.org/D63731

    This change brings back AMDGPU specific changes.

  Reviewed by: rampitec, arsenm

  Differential Revision: https://reviews.llvm.org/D68635

llvm-svn: 374767
2019-10-14 12:01:10 +00:00

38 lines
962 B
LLVM

; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
; GCN-LABEL: {{^}}test_dont_clobber_scc:
; GCN: ; %entry
; GCN: s_cmp_eq_u32 s0, 0
; GCN: s_cbranch_scc1 [[PREEXIT:BB[0-9_]+]]
; GCN: ; %blocka
; GCN: s_cmp_eq_u32 s1, 0
; GCN: s_cbranch_scc1 [[EXIT:BB[0-9_]+]]
; GCN: [[PREEXIT]]:
; GCN: [[EXIT]]:
define amdgpu_vs float @test_dont_clobber_scc(i32 inreg %uni, i32 inreg %uni2) #0 {
entry:
%cc.uni = icmp eq i32 %uni, 0
br i1 %cc.uni, label %exit, label %blocka
blocka:
call void asm sideeffect "; dummy a", ""()
%cc.uni2 = icmp eq i32 %uni2, 0
br i1 %cc.uni2, label %exit, label %blockb
blockb:
call void asm sideeffect "; dummy b", ""()
br label %exit
exit:
%cc.phi = phi i1 [ true, %entry ], [ false, %blocka ], [ false, %blockb ]
call void asm sideeffect "; dummy exit", ""()
%r = select i1 %cc.phi, float 1.0, float 2.0
ret float %r
}
attributes #0 = { nounwind }