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llvm-mirror/lib/Target/AArch64
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Matthias Braun 4869e8d140 AArch64/optimizeCondBranch: Remove earlier kill flag when forming TBZ 
This fixes -verify-machineinstrs complaints when compiling
test-suite/SingleSource/Benchmarks/Shootout-C++/wordfreq.cpp

llvm-svn: 268360
2016-05-03 04:54:16 +00:00
..
AsmParser [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
Disassembler Remove autoconf support 2016-01-26 21:29:08 +00:00
InstPrinter Remove autoconf support 2016-01-26 21:29:08 +00:00
MCTargetDesc [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64.h AArch64: avoid clobbering SP for dead MOVimm pseudos. 2016-04-01 23:14:52 +00:00
AArch64.td AArch64: remove CRC feature from Cyclone. 2016-02-24 18:10:17 +00:00
AArch64A53Fix835769.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64A57FPLoadBalancing.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64AddressTypePromotion.cpp Cleanup comments. NFC. 2016-05-02 14:50:30 +00:00
AArch64AdvSIMDScalarPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64AsmPrinter.cpp Clean up redundant copies of Triple objects. NFC 2015-06-16 15:44:21 +00:00
AArch64BranchRelaxation.cpp [AArch64] Fix typo. NFC. 2016-03-25 14:37:43 +00:00
AArch64CallingConvention.h Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
AArch64CallingConvention.td AArch64: Use a callee save registers for swiftself parameters 2016-04-13 21:43:16 +00:00
AArch64CallLowering.cpp [GlobalISel] Coding style and whitespace fixes 2016-04-14 17:23:33 +00:00
AArch64CallLowering.h [GlobalISel] Coding style and whitespace fixes 2016-04-14 17:23:33 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64CollectLOH.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64ConditionalCompares.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64ConditionOptimizer.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64ExpandPseudoInsts.cpp livePhysRegs: Pass MBB by reference in addLive{Ins|Outs}(); NFC 2016-05-03 00:24:32 +00:00
AArch64FastISel.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64FrameLowering.cpp [AArch64] Add MMOs to callee-save load/store instructions. 2016-04-15 15:16:19 +00:00
AArch64FrameLowering.h Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
AArch64InstrAtomics.td AArch64: expand cmpxchg after regalloc at -O0. 2016-04-14 17:03:29 +00:00
AArch64InstrFormats.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64InstrInfo.cpp AArch64/optimizeCondBranch: Remove earlier kill flag when forming TBZ 2016-05-03 04:54:16 +00:00
AArch64InstrInfo.h Cleanup comments. NFC. 2016-05-02 14:56:21 +00:00
AArch64InstrInfo.td AArch64: remove pseudo-instructions used only for their patterns. 2016-03-10 18:46:12 +00:00
AArch64ISelDAGToDAG.cpp AArch64: expand cmpxchg after regalloc at -O0. 2016-04-14 17:03:29 +00:00
AArch64ISelLowering.cpp [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLoweringBase. This is what the majority of the targets want and removes a bunch of code. Set it to Legal explicitly in the few cases where that's the desired behavior. 2016-04-28 03:34:31 +00:00
AArch64ISelLowering.h Use MVT instead of EVT to remove a bunch of unnecessary calls to getSimpleVT. 2016-04-15 06:20:21 +00:00
AArch64LoadStoreOptimizer.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64MachineFunctionInfo.h [AArch64] Break the dependency between FP and SP when possible. 2016-03-14 18:17:41 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PBQPRegAlloc.cpp CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 2016-02-27 06:40:41 +00:00
AArch64PBQPRegAlloc.h Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) 2015-06-23 09:49:53 +00:00
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64RedundantCopyElimination.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64RegisterBankInfo.cpp [RegisterBankInfo] Change the API for the verify methods. 2016-04-21 18:34:43 +00:00
AArch64RegisterBankInfo.h [AArch64] Teach RegisterBankInfo about the CC register bank. 2016-04-07 00:39:29 +00:00
AArch64RegisterInfo.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64RegisterInfo.h CXX_FAST_TLS calling convention: performance improvement for AArch64. 2015-12-16 21:04:19 +00:00
AArch64RegisterInfo.td Fix typo in comment. NFC 2016-04-24 17:55:57 +00:00
AArch64SchedA53.td Remove MinLatency in SchedMachineModel. NFC. 2016-04-26 00:37:46 +00:00
AArch64SchedA57.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SchedKryo.td AArch64: Reenable CompleteModel for A53, A57 and Kryo models 2016-03-01 21:55:35 +00:00
AArch64SchedKryoDetails.td [AArch64] Add support for Qualcomm Kryo CPU. 2016-02-12 15:51:51 +00:00
AArch64SchedM1.td Remove MinLatency in SchedMachineModel. NFC. 2016-04-26 00:37:46 +00:00
AArch64Schedule.td AArch64: Add missing schedinfo, check completeness for cyclone 2016-03-01 21:20:31 +00:00
AArch64SelectionDAGInfo.cpp [DAGCombiner] Follow coding convention for function name (NFC) 2016-04-27 17:27:16 +00:00
AArch64SelectionDAGInfo.h [DAGCombiner] Follow coding convention for function name (NFC) 2016-04-27 17:27:16 +00:00
AArch64StorePairSuppress.cpp Add optimization bisect opt-in calls for AArch64 passes 2016-04-25 21:58:52 +00:00
AArch64Subtarget.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AArch64Subtarget.h [GlobalISel] Move GISelAccessor class into public headers 2016-04-14 17:45:38 +00:00
AArch64TargetMachine.cpp [GlobalISel] Move GISelAccessor class into public headers 2016-04-14 17:45:38 +00:00
AArch64TargetMachine.h Replace string GNU Triples with llvm::Triple in TargetMachine. NFC. 2015-06-11 19:41:26 +00:00
AArch64TargetObjectFile.cpp MC: Clean up MCExpr naming. NFC. 2015-05-30 01:25:56 +00:00
AArch64TargetObjectFile.h [AsmPrinter][TLOF] 32-bit MachO support for replacing GOT equivalents 2015-03-06 13:49:05 +00:00
AArch64TargetTransformInfo.cpp Add parentheses to silence buildbot warning 2016-04-27 16:25:04 +00:00
AArch64TargetTransformInfo.h [TTI] Add hook for vector extract with extension 2016-04-27 15:20:21 +00:00
CMakeLists.txt [AArch64][CallLowering] Do not build the API if GlobalISel is not built. 2016-04-07 20:47:51 +00:00
LLVMBuild.txt [AArch64] Plug the beginning of the GlobalISel pipeline. 2016-02-11 19:35:06 +00:00