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c6f20cb624
llvm-mirror/lib/Target/AMDGPU
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Matt Arsenault c6f20cb624 AMDGPU: Minor adjustment to r274817 
The commit message is inaccurate, modifiesRegister
will check for partial defs of exec.

We currently don't ever emit partial defs of exec,
so it doesn't really matter.

llvm-svn: 274886
2016-07-08 17:06:48 +00:00
..
AsmParser [AMDGPU] Assembler: Fix parsing error with floating-point literals passed to integer instructions 2016-07-05 14:01:11 +00:00
Disassembler AMDGPU: Fix trailing whitespace 2016-06-10 02:18:02 +00:00
InstPrinter AMDGPU: Remove unnecessary string usage in AsmPrinter 2016-07-05 22:06:56 +00:00
MCTargetDesc Delete MCCodeGenInfo. 2016-06-30 18:25:11 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
Utils [AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields. 2016-06-23 14:13:06 +00:00
AMDGPU.h AMDGPU: Add stub custom CodeGenPrepare pass 2016-06-24 07:07:55 +00:00
AMDGPU.td AMDGPU: Add feature for unaligned access 2016-07-01 23:03:44 +00:00
AMDGPUAlwaysInlinePass.cpp Cloning: Clean up the interface to the CloneFunction function. 2016-05-10 20:23:24 +00:00
AMDGPUAnnotateKernelFeatures.cpp AMDGPU: Fix constantexpr addrspacecasts 2016-06-06 20:03:31 +00:00
AMDGPUAnnotateUniformValues.cpp Add optimization bisect opt-in calls for AMDGPU passes 2016-04-25 22:23:44 +00:00
AMDGPUAsmPrinter.cpp [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header 2016-06-25 03:11:28 +00:00
AMDGPUAsmPrinter.h [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header 2016-06-25 03:11:28 +00:00
AMDGPUCallingConv.td AMDGPU: Fix kernel argument alignment impacting stack size 2016-06-18 05:15:53 +00:00
AMDGPUCallLowering.cpp AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
AMDGPUCallLowering.h AMDGPU: Add skeleton GlobalIsel implementation 2016-04-14 19:09:28 +00:00
AMDGPUCodeGenPrepare.cpp AMDGPU: Add stub custom CodeGenPrepare pass 2016-06-24 07:07:55 +00:00
AMDGPUFrameLowering.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDGPUFrameLowering.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDGPUInstrInfo.cpp Fix "not all control paths return a value" warning on MSVC 2016-06-27 12:58:10 +00:00
AMDGPUInstrInfo.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDGPUInstrInfo.td AMDGPU: Fix verifier errors in SILowerControlFlow 2016-06-22 20:15:28 +00:00
AMDGPUInstructions.td AMDGPU: Fix folding SGPRs into madak/madmk src0 2016-07-05 17:09:01 +00:00
AMDGPUIntrinsicInfo.cpp [llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names 2016-01-27 01:43:12 +00:00
AMDGPUIntrinsicInfo.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPUIntrinsics.td AMDGPU: Remove bfi and bfm intrinsics 2016-02-08 19:06:01 +00:00
AMDGPUISelDAGToDAG.cpp AMDGPU/SI: Remove address space query functions from AMDGPUDAGToDAGISel 2016-07-05 16:10:44 +00:00
AMDGPUISelLowering.cpp AMDGPU: Expand unaligned accesses early 2016-07-01 22:55:55 +00:00
AMDGPUISelLowering.h AMDGPU: Expand unaligned accesses early 2016-07-01 22:55:55 +00:00
AMDGPUMachineFunction.cpp Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2. 2016-07-01 10:00:58 +00:00
AMDGPUMachineFunction.h Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2. 2016-07-01 10:00:58 +00:00
AMDGPUMCInstLower.cpp AMDGPU: Move si_mask_branch register operand to be a use 2016-07-08 00:55:44 +00:00
AMDGPUMCInstLower.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
AMDGPUOpenCLImageTypeLoweringPass.cpp [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
AMDGPUPromoteAlloca.cpp AMDGPU: Move subtarget feature checks into passes 2016-06-27 20:32:13 +00:00
AMDGPURegisterInfo.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDGPURegisterInfo.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDGPURegisterInfo.td AMDGPU: Set SubRegIndex size and offset 2015-07-30 17:03:11 +00:00
AMDGPUSubtarget.cpp AMDGPU: Add feature for unaligned access 2016-07-01 23:03:44 +00:00
AMDGPUSubtarget.h AMDGPU: Add feature for unaligned access 2016-07-01 23:03:44 +00:00
AMDGPUTargetMachine.cpp AMDGPU: Add option to run the load/store vectorizer 2016-07-01 03:33:52 +00:00
AMDGPUTargetMachine.h AMDGPU: Implement per-function subtargets 2016-06-27 20:48:03 +00:00
AMDGPUTargetObjectFile.cpp AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
AMDGPUTargetObjectFile.h AMDGPU/SI: Add support for AMD code object version 2. 2016-05-05 17:03:33 +00:00
AMDGPUTargetTransformInfo.cpp AMDGPU: Implement getLoadStoreVecRegBitWidth 2016-07-01 00:56:27 +00:00
AMDGPUTargetTransformInfo.h [TTI] The cost model should not assume vector casts get completely scalarized 2016-07-06 17:30:56 +00:00
AMDILCFGStructurizer.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
AMDKernelCodeT.h [AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields) 2016-02-24 10:54:25 +00:00
CaymanInstructions.td AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads 2016-07-05 00:12:51 +00:00
CIInstructions.td AMDGPU: Fix flat atomics 2016-06-09 23:42:54 +00:00
CMakeLists.txt AMDGPU: Add stub custom CodeGenPrepare pass 2016-06-24 07:07:55 +00:00
EvergreenInstructions.td AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads 2016-07-05 00:12:51 +00:00
GCNHazardRecognizer.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
GCNHazardRecognizer.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
LLVMBuild.txt Update libdeps; AMDGPUCodeGen requires LLVMVectorize. 2016-07-01 09:55:23 +00:00
Processors.td AMDGPU: Fix crashes on unknown processor name 2016-06-02 18:37:16 +00:00
R600ClauseMergePass.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600ControlFlowFinalizer.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600Defines.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
R600EmitClauseMarkers.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600ExpandSpecialInstrs.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600FrameLowering.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600FrameLowering.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600InstrFormats.td
R600InstrInfo.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600InstrInfo.h CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600Instructions.td AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads 2016-07-05 00:12:51 +00:00
R600Intrinsics.td AMDGPU: Move AMDGPU intrinsics only used by R600 2016-01-26 04:49:24 +00:00
R600ISelLowering.cpp CodeGen: Use MachineInstr& in TargetLowering, NFC 2016-06-30 22:52:52 +00:00
R600ISelLowering.h CodeGen: Use MachineInstr& in TargetLowering, NFC 2016-06-30 22:52:52 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
R600MachineScheduler.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600MachineScheduler.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600OptimizeVectorRegisters.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600Packetizer.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
R600RegisterInfo.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600RegisterInfo.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
R600RegisterInfo.td
R600Schedule.td AMDGPU: Fix trailing whitespace 2016-06-10 02:18:02 +00:00
R600TextureIntrinsicsReplacer.cpp AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix 2016-01-22 19:00:09 +00:00
R700Instructions.td
SIAnnotateControlFlow.cpp AMDGPU: Fix trailing whitespace 2016-06-10 02:18:02 +00:00
SIDebuggerInsertNops.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIDefines.h AMDGPU: Fix folding SGPRs into madak/madmk src0 2016-07-05 17:09:01 +00:00
SIFixControlFlowLiveIntervals.cpp AMDGPU: Remove unused includes 2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIFoldOperands.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
SIFrameLowering.cpp [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header 2016-06-25 03:11:28 +00:00
SIFrameLowering.h [AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header 2016-06-25 03:11:28 +00:00
SIInsertWaits.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIInstrFormats.td AMDGPU: Fix verifier errors in SILowerControlFlow 2016-06-22 20:15:28 +00:00
SIInstrInfo.cpp AMDGPU: Fix folding SGPRs into madak/madmk src0 2016-07-05 17:09:01 +00:00
SIInstrInfo.h CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
SIInstrInfo.td [AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371) 2016-07-08 15:12:46 +00:00
SIInstructions.td [AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371) 2016-07-08 15:12:46 +00:00
SIIntrinsics.td AMDGPU: Remove llvm.SI.tid intrinsic 2016-06-17 21:18:41 +00:00
SIISelLowering.cpp AMDGPU: Add feature for unaligned access 2016-07-01 23:03:44 +00:00
SIISelLowering.h CodeGen: Use MachineInstr& in TargetLowering, NFC 2016-06-30 22:52:52 +00:00
SILoadStoreOptimizer.cpp AMDGPU: Move subtarget feature checks into passes 2016-06-27 20:32:13 +00:00
SILowerControlFlow.cpp AMDGPU: Minor adjustment to r274817 2016-07-08 17:06:48 +00:00
SILowerI1Copies.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIMachineFunctionInfo.cpp SIMachineFunctionInfo.cpp: Appease msc18 to use std::array. 2016-06-27 10:26:43 +00:00
SIMachineFunctionInfo.h SIMachineFunctionInfo.cpp: Appease msc18 to use std::array. 2016-06-27 10:26:43 +00:00
SIMachineScheduler.cpp AMDGPU/SI: Enable testing several variants for si scheduler 2016-07-01 18:03:46 +00:00
SIMachineScheduler.h AMDGPU: R600 code splitting cleanup 2016-03-11 08:00:27 +00:00
SIRegisterInfo.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
SIRegisterInfo.h AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
SIRegisterInfo.td AMDGPU: Define priorities for register classes 2016-05-21 03:55:07 +00:00
SISchedule.td AMDGPU: Define a schedule class for COPY. 2016-06-24 23:52:11 +00:00
SIShrinkInstructions.cpp CodeGen: Use MachineInstr& in TargetInstrInfo, NFC 2016-06-30 00:01:54 +00:00
SITypeRewriter.cpp AMDGPU: Add a shader calling convention 2016-04-06 19:40:20 +00:00
SIWholeQuadMode.cpp AMDGPU: Cleanup subtarget handling. 2016-06-24 06:30:11 +00:00
VIInstrFormats.td [AMDGPU] Assembler: support SDWA for VOPC instructions 2016-07-01 09:59:21 +00:00
VIInstructions.td AMDGPU: Add v_mad 16-bit instructions definition. 2016-06-16 16:50:04 +00:00