Peter Collingbourne c85b081732 LTO: Include dso-local bit in ThinLTO cache key. ... Differential Revision: https://reviews.llvm.org/D42713 llvm-svn: 324253		2018-02-05 17:17:51 +00:00
..
Analysis	[AMDGPU] Switch to the new addr space mapping by default	2018-02-02 16:07:16 +00:00
Assembler	LLParser: add an argument for overriding data layout and do not check alloca addr space	2018-01-30 22:32:39 +00:00
Bindings	[LLVM-C] Add Accessors For A Module's Source File Name	2018-01-30 21:34:29 +00:00
Bitcode
BugPoint
CodeGen	[X86] Teach X86DAGToDAGISel::shrinkAndImmediate to preserve upper 32 zeroes of a 64 bit mask.	2018-02-05 16:54:07 +00:00
DebugInfo	[AMDGPU] Switch to the new addr space mapping by default	2018-02-02 16:07:16 +00:00
Examples
ExecutionEngine
Feature	Mark two tests REQUIRES: x86-registered-backend	2018-01-31 07:32:03 +00:00
FileCheck
Instrumentation	[InstrProfiling] Don't exit early when an unused intrinsic is found	2018-01-27 00:01:04 +00:00
Integer
JitListener
Linker
LTO	LTO: Include dso-local bit in ThinLTO cache key.	2018-02-05 17:17:51 +00:00
MC	[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier	2018-02-05 14:18:53 +00:00
Object
ObjectYAML
Other	Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass to mark	2018-01-30 16:17:22 +00:00
SafepointIRVerifier
SymbolRewriter
TableGen	[TableGen] Make sure !if is evaluated throughout class inheritance.	2018-01-30 19:29:21 +00:00
ThinLTO/X86	Teach ValueMapper to use ODR uniqued types when available	2018-01-30 20:16:32 +00:00
tools	Add missing new files from r324077	2018-02-02 12:45:57 +00:00
Transforms	Revert r323472 "[Debug] Add dbg.value intrinsics for PHIs created during LCSSA."	2018-02-05 16:10:42 +00:00
Unit
Verifier	Followup on Proposal to move MIR physical register namespace to '$' sigil.	2018-01-31 22:04:26 +00:00
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in
TestRunner.sh