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7932e530a0
Now that unaligned access expansion should not attempt to produce i64 accesses, we can remove the hack in PreprocessISelDAG where this is done. This allows splitting i64 private accesses while allowing the new add nodes indexing the vector components can be folded with the base pointer arithmetic. llvm-svn: 268293
159 lines
5.2 KiB
LLVM
159 lines
5.2 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; Test that materialization constants that are the bit reversed of
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; inline immediates are replaced with bfrev of the inline immediate to
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; save code size.
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; GCN-LABEL: {{^}}materialize_0_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_0_i32(i32 addrspace(1)* %out) {
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store i32 0, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_0_i64:
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; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
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; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_0_i64(i64 addrspace(1)* %out) {
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store i64 0, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_neg1_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -1{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_neg1_i32(i32 addrspace(1)* %out) {
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store i32 -1, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_neg1_i64:
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; GCN: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
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; GCN: v_mov_b32_e32 v[[HIK:[0-9]+]], v[[LOK]]{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_neg1_i64(i64 addrspace(1)* %out) {
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store i64 -1, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_signbit_i32:
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; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 1{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_signbit_i32(i32 addrspace(1)* %out) {
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store i32 -2147483648, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_signbit_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
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; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 1{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_signbit_i64(i64 addrspace(1)* %out) {
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store i64 -9223372036854775808, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_neg16_i32:
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; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], -16{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_neg16_i32(i32 addrspace(1)* %out) {
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store i32 268435455, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_neg16_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
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; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], -16{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_neg16_i64(i64 addrspace(1)* %out) {
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store i64 1152921504606846975, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_neg17_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0xf7ffffff{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_neg17_i32(i32 addrspace(1)* %out) {
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store i32 -134217729, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_neg17_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], -1{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0xf7ffffff{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_neg17_i64(i64 addrspace(1)* %out) {
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store i64 -576460752303423489, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_64_i32:
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; GCN: v_bfrev_b32_e32 [[K:v[0-9]+]], 64{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_64_i32(i32 addrspace(1)* %out) {
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store i32 33554432, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_64_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
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; GCN-DAG: v_bfrev_b32_e32 v[[HIK:[0-9]+]], 64{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_64_i64(i64 addrspace(1)* %out) {
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store i64 144115188075855872, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_65_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x82000000{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_65_i32(i32 addrspace(1)* %out) {
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store i32 -2113929216, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_65_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0x82000000{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_65_i64(i64 addrspace(1)* %out) {
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store i64 -9079256848778919936, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_3_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], -2.0{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_3_i32(i32 addrspace(1)* %out) {
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store i32 -1073741824, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_3_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], -2.0{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_3_i64(i64 addrspace(1)* %out) {
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store i64 -4611686018427387904, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_1.0_i32:
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; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0x1fc{{$}}
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; GCN: buffer_store_dword [[K]]
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define void @materialize_rev_1.0_i32(i32 addrspace(1)* %out) {
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store i32 508, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}materialize_rev_1.0_i64:
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; GCN-DAG: v_mov_b32_e32 v[[LOK:[0-9]+]], 0x1fc{{$}}
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; GCN-DAG: v_mov_b32_e32 v[[HIK:[0-9]+]], 0{{$}}
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; GCN: buffer_store_dwordx2 v{{\[}}[[LOK]]:[[HIK]]{{\]}}
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define void @materialize_rev_1.0_i64(i64 addrspace(1)* %out) {
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store i64 508, i64 addrspace(1)* %out
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ret void
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}
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