..
AsmParser
[AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc()
2021-07-26 09:36:34 +00:00
Disassembler
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
GISel
AArch64: support i128 (& larger) returns in GlobalISel
2021-07-26 14:16:35 +01:00
MCTargetDesc
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
TargetInfo
Utils
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
AArch64.h
AArch64.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
[AArch64] De-capitalize some Emit* functions
2021-07-11 22:05:39 -07:00
AArch64BranchTargets.cpp
AArch64CallingConvention.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64Combine.td
[AArch64][GlobalISel] Enable some select combines after legalization.
2021-07-26 10:40:32 -07:00
AArch64CompressJumpTables.cpp
AArch64CondBrTuning.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandImm.cpp
AArch64ExpandImm.h
AArch64ExpandPseudoInsts.cpp
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64FalkorHWPFFix.cpp
AArch64FastISel.cpp
[AArch64] Optimize overflow checks for [s|u]mul.with.overflow.i32.
2021-07-12 15:30:42 -07:00
AArch64FrameLowering.cpp
[AArch64] Fix Local Deallocation for Homogeneous Prolog/Epilog
2021-07-25 10:51:11 -07:00
AArch64FrameLowering.h
[NFC] Fix a few whitespace issues and typos.
2021-07-04 11:49:58 +01:00
AArch64GenRegisterBankInfo.def
AArch64InstrAtomics.td
[AArch64] Fix i128 cmpxchg using ldxp/stxp.
2021-07-20 12:38:12 -07:00
AArch64InstrFormats.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64InstrGISel.td
AArch64InstrInfo.cpp
[AArch64] Dump a little more info about unimplemented reg-to-reg copies. NFC
2021-07-12 15:37:11 -07:00
AArch64InstrInfo.h
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64InstrInfo.td
[AArch64][SME] Add matrix register definitions and parsing support
2021-07-14 08:25:49 +00:00
AArch64ISelDAGToDAG.cpp
[SVE] Use reg+reg addressing mode for immediate offsets.
2021-07-26 16:24:16 +01:00
AArch64ISelLowering.cpp
[SVE][AArch64] Improve code generation for vector_splice for Imm > 0
2021-07-26 11:45:46 +01:00
AArch64ISelLowering.h
[AArch64][SVE] Improve code generation for vector_splice for Imm == -1
2021-07-26 11:25:01 +01:00
AArch64LoadStoreOptimizer.cpp
Revert "[AArch64LoadStoreOptimizer] Recommit: Generate more STPs by renaming registers earlier"
2021-06-23 09:54:16 +03:00
AArch64LowerHomogeneousPrologEpilog.cpp
[CodeGen] Add missing includes (NFC)
2021-06-06 15:48:27 +02:00
AArch64MachineFunctionInfo.cpp
[llvm] Rename StringRef _lower() method calls to _insensitive()
2021-06-25 00:22:01 +03:00
AArch64MachineFunctionInfo.h
AArch64MacroFusion.cpp
AArch64MacroFusion.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td
AArch64PromoteConstant.cpp
AArch64RedundantCopyElimination.cpp
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp
[AArch64][SME] Add load and store instructions
2021-07-16 10:11:10 +00:00
AArch64RegisterInfo.h
AArch64RegisterInfo.td
[AArch64][SME] Improve diagnostic for vector select register
2021-07-22 13:46:40 +00:00
AArch64SchedA53.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedA55.td
[AArch64] Update Cortex-A55 SchedModel to improve LDP scheduling
2021-07-16 12:00:57 +01:00
AArch64SchedA57.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedA57WriteRes.td
AArch64SchedA64FX.td
AArch64SchedCyclone.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM3.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM4.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedExynosM5.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedFalkor.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedFalkorDetails.td
AArch64SchedKryo.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedKryoDetails.td
AArch64SchedPredExynos.td
AArch64SchedPredicates.td
AArch64SchedThunderX2T99.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedThunderX3T110.td
AArch64SchedThunderX.td
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SchedTSV110.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64SIMDInstrOpt.cpp
AArch64SLSHardening.cpp
AArch64SMEInstrInfo.td
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
AArch64SpeculationHardening.cpp
AArch64StackTagging.cpp
[NFC][asan] Always pass Dominator Trees into forAllReachableExits
2021-07-22 18:01:38 -07:00
AArch64StackTaggingPreRA.cpp
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
[AArch64][SVE] Wire up vscale_range attribute to SVE min/max vector queries
2021-06-21 13:00:36 +01:00
AArch64Subtarget.h
[AArch64] Add target features for Armv9-A Scalable Matrix Extension (SME)
2021-07-12 13:28:10 +00:00
AArch64SVEInstrInfo.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
AArch64SystemOperands.td
[AArch64][SME] Add system registers and related instructions
2021-07-20 08:06:26 +00:00
AArch64TargetMachine.cpp
Fix typo in help text for -aarch64-enable-branch-targets.
2021-07-05 16:15:40 +01:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
[Analysis] Add simple cost model for strict (in-order) reductions
2021-07-26 10:26:06 +01:00
AArch64TargetTransformInfo.h
[Analysis] Add simple cost model for strict (in-order) reductions
2021-07-26 10:26:06 +01:00
CMakeLists.txt
SMEInstrFormats.td
[AArch64][SME] Add mova instructions
2021-07-21 08:20:01 +00:00
SVEInstrFormats.td
[AArch64][SVE] Break false dependencies for inactive lanes of unary operations
2021-07-26 15:01:21 +00:00
SVEIntrinsicOpts.cpp
[AArch64][SVE] Move instcombine like transforms out of SVEIntrinsicOpts
2021-07-20 14:17:30 +00:00
