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llvm-mirror/lib/CodeGen/SelectionDAG
Craig Topper 58cb6eb653 [TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only the sign bit is demanded from a SETCC and can be passed through
If we're doing a compare that only tests the sign bit and only the sign bit is demanded, we can just bypass the node. This removes one of the blend dependencies in our v2i64->v2f32 uint_to_fp codegen on pre-sse4.2 targets.

Differential Revision: https://reviews.llvm.org/D72356
2020-01-09 10:21:25 -08:00
..
CMakeLists.txt [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
DAGCombiner.cpp [DAGCombiner] reduce extract subvector of concat 2020-01-09 09:38:12 -05:00
FastISel.cpp Move tail call disabling code to target independent code 2020-01-03 11:27:41 -08:00
FunctionLoweringInfo.cpp [AArch64][SVE] Allocate locals that are scalable vectors. 2019-11-13 09:45:24 +00:00
InstrEmitter.cpp [FPEnv] Default NoFPExcept SDNodeFlag to false 2020-01-02 16:59:45 +01:00
InstrEmitter.h
LegalizeDAG.cpp [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
LegalizeFloatTypes.cpp [X86] Adding fp128 support for strict fcmp 2020-01-08 12:59:31 +08:00
LegalizeIntegerTypes.cpp [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
LegalizeTypes.cpp [LegalizeTypes] Remove manual worklist management from SoftenFloatRes_FP_EXTEND. 2019-12-10 22:33:31 -08:00
LegalizeTypes.h [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
LegalizeTypesGeneric.cpp [NFC] Use SelectionDAG::getMemBasePlusOffset() instead of getNode(ISD::ADD) 2019-12-13 21:40:03 +00:00
LegalizeVectorOps.cpp [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
LegalizeVectorTypes.cpp [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
LLVMBuild.txt
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp Recommit "Add a heap alloc site marker field to the ExtraInfo in MachineInstrs" 2019-10-28 16:59:32 -07:00
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SelectionDAG.cpp [SelectionDAG] Use llvm::Optional<APInt> for FoldValue. 2020-01-08 16:09:24 +00:00
SelectionDAGAddressAnalysis.cpp
SelectionDAGBuilder.cpp [Intrinsic] Add fixed point division intrinsics. 2020-01-08 15:17:46 +01:00
SelectionDAGBuilder.h [IR] Redefine Freeze instruction 2019-11-12 10:49:00 +09:00
SelectionDAGDumper.cpp Revert "Revert "[MIR] Target specific MIR formating and parsing"" 2020-01-08 20:03:29 -08:00
SelectionDAGISel.cpp [FPEnv] Default NoFPExcept SDNodeFlag to false 2020-01-02 16:59:45 +01:00
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp [SVE][CodeGen] Scalable vector MVT size queries 2019-11-18 12:30:59 +00:00
StatepointLowering.h
TargetLowering.cpp [TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only the sign bit is demanded from a SETCC and can be passed through 2020-01-09 10:21:25 -08:00