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AsmMatcherEmitter.cpp
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[WebAssembly] Simplified selecting asmmatcher stack instructions.
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2018-09-21 20:53:55 +00:00 |
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AsmWriterEmitter.cpp
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[TableGen] Prevent double flattening of InstAlias asm strings in the asm matcher emitter.
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2018-06-18 01:28:01 +00:00 |
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AsmWriterInst.cpp
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AsmWriterInst.h
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Attributes.cpp
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CallingConvEmitter.cpp
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CMakeLists.txt
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[WebAssembly] TableGen backend for stackifying instructions
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2018-08-27 22:02:09 +00:00 |
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CodeEmitterGen.cpp
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CodeGenDAGPatterns.cpp
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TableGen/CodeGenDAGPatterns: addPredicateFn only once
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2018-10-08 16:53:31 +00:00 |
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CodeGenDAGPatterns.h
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TableGen/CodeGenDAGPatterns: addPredicateFn only once
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2018-10-08 16:53:31 +00:00 |
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CodeGenHwModes.cpp
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CodeGenHwModes.h
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CodeGenInstruction.cpp
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[WebAssembly] Add isEHScopeReturn instruction property
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2018-08-21 19:44:11 +00:00 |
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CodeGenInstruction.h
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[WebAssembly] Add isEHScopeReturn instruction property
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2018-08-21 19:44:11 +00:00 |
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CodeGenIntrinsics.h
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CodeGenMapTable.cpp
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CodeGenRegisters.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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CodeGenRegisters.h
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[TableGen] Return ValueTypeByHwMode by const reference from CodeGenRegisterClass::getValueTypeNum
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2018-08-16 15:29:24 +00:00 |
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CodeGenSchedule.cpp
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[tblgen][CodeGenSchedule] Add a check for invalid RegisterFile definitions with zero physical registers.
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2018-10-11 10:39:03 +00:00 |
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CodeGenSchedule.h
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[llvm-exegesis] Add support for measuring NumMicroOps.
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2018-09-26 11:22:56 +00:00 |
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CodeGenTarget.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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CodeGenTarget.h
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[GlobalISel][Tablegen] Assign small opcodes to pseudos
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2018-05-23 22:10:21 +00:00 |
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CTagsEmitter.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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DAGISelEmitter.cpp
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[TableGen] Support multi-alternative pattern fragments
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2018-07-13 13:18:00 +00:00 |
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DAGISelMatcher.cpp
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DAGISelMatcher.h
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DAGISelMatcherEmitter.cpp
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DAGISelMatcherGen.cpp
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[TableGen] Return ValueTypeByHwMode by const reference from CodeGenRegisterClass::getValueTypeNum
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2018-08-16 15:29:24 +00:00 |
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DAGISelMatcherOpt.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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DFAPacketizerEmitter.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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DisassemblerEmitter.cpp
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[WebAssembly] Initial Disassembler.
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2018-05-10 22:16:44 +00:00 |
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FastISelEmitter.cpp
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Use the container form llvm::sort(C, ...)
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2018-09-30 22:31:29 +00:00 |
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FixedLenDecoderEmitter.cpp
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[windows] Don't inline fieldFromInstruction on Windows
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2018-07-25 17:33:20 +00:00 |
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GlobalISelEmitter.cpp
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Use the container form llvm::sort(C, ...)
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2018-09-30 22:31:29 +00:00 |
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InfoByHwMode.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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InfoByHwMode.h
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[TableGen] Don't separately search for DefaultMode when we're going to iterate the set anyway. NFCI.
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2018-08-17 17:45:15 +00:00 |
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InstrDocsEmitter.cpp
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[WebAssembly] Add isEHScopeReturn instruction property
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2018-08-21 19:44:11 +00:00 |
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InstrInfoEmitter.cpp
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[WebAssembly] Add isEHScopeReturn instruction property
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2018-08-21 19:44:11 +00:00 |
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IntrinsicEmitter.cpp
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[Power9] Add __float128 builtins for Round To Odd
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2018-07-09 18:50:06 +00:00 |
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LLVMBuild.txt
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Add missing dependency (headers are included from MC, so a link dependency could exist easily enough)
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2018-03-29 00:29:43 +00:00 |
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OptParserEmitter.cpp
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PredicateExpander.cpp
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[TableGen][SubtargetEmitter] Add the ability for processor models to describe dependency breaking instructions.
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2018-09-19 15:57:45 +00:00 |
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PredicateExpander.h
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[TableGen][SubtargetEmitter] Add the ability for processor models to describe dependency breaking instructions.
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2018-09-19 15:57:45 +00:00 |
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PseudoLoweringEmitter.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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RegisterBankEmitter.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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RegisterInfoEmitter.cpp
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[MC] Remove PhysRegSize from MCRegisterClass
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2018-08-09 15:19:07 +00:00 |
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RISCVCompressInstEmitter.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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SDNodeProperties.cpp
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SDNodeProperties.h
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SearchableTableEmitter.cpp
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TableGen/SearchableTables: Cast enums to unsigned in generated code
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2018-08-23 08:02:02 +00:00 |
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SequenceToOffsetTable.h
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SubtargetEmitter.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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SubtargetFeatureInfo.cpp
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IWYU for llvm-config.h in llvm, additions.
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2018-04-30 14:59:11 +00:00 |
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SubtargetFeatureInfo.h
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Remove \brief commands from doxygen comments.
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2018-05-01 15:54:18 +00:00 |
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TableGen.cpp
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[WebAssembly] TableGen backend for stackifying instructions
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2018-08-27 22:02:09 +00:00 |
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TableGenBackends.h
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[WebAssembly] TableGen backend for stackifying instructions
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2018-08-27 22:02:09 +00:00 |
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tdtags
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Types.cpp
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Types.h
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WebAssemblyDisassemblerEmitter.cpp
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[WebAssembly] Made disassembler only use stack instructions.
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2018-08-30 15:40:53 +00:00 |
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WebAssemblyDisassemblerEmitter.h
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[WebAssembly] Initial Disassembler.
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2018-05-10 22:16:44 +00:00 |
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WebAssemblyStackifierEmitter.cpp
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[WebAssembly][NFC] Document stackifier tablegen backend
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2018-08-28 18:49:47 +00:00 |
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X86DisassemblerShared.h
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X86DisassemblerTables.cpp
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[X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode.
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2018-04-22 00:52:02 +00:00 |
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X86DisassemblerTables.h
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[X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute.
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2018-03-24 07:48:54 +00:00 |
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X86EVEX2VEXTablesEmitter.cpp
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[X86] Add the ability to force an EVEX2VEX mapping table entry from the .td files. Remove remaining manual table entries from the tablegen emitter.
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2018-06-19 04:24:44 +00:00 |
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X86FoldTablesEmitter.cpp
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[X86] More additions to the load folding tables based on the autogenerated tables.
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2018-06-16 23:25:50 +00:00 |
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X86ModRMFilters.cpp
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X86ModRMFilters.h
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Test commit: remove trailing whitespace
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2018-09-11 17:28:43 +00:00 |
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X86RecognizableInstr.cpp
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[X86] Don't ignore 0x66 prefix on relative jumps in 64-bit mode. Fix opcode selection of relative jumps in 16-bit mode. Treat jno/jo like other jcc instructions.
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2018-08-13 22:06:28 +00:00 |
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X86RecognizableInstr.h
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[X86] Add a new VEX_WPrefix encoding to tag EVEX instruction that have VEX.W==1, but can be converted to their VEX equivalent that uses VEX.W==0.
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2018-06-19 04:24:42 +00:00 |
