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b5b6e8e953
This adds support for constrained floating-point comparison intrinsics.
Specifically, we add:
declare <ty2>
@llvm.experimental.constrained.fcmp(<type> <op1>, <type> <op2>,
metadata <condition code>,
metadata <exception behavior>)
declare <ty2>
@llvm.experimental.constrained.fcmps(<type> <op1>, <type> <op2>,
metadata <condition code>,
metadata <exception behavior>)
The first variant implements an IEEE "quiet" comparison (i.e. we only
get an invalid FP exception if either argument is a SNaN), while the
second variant implements an IEEE "signaling" comparison (i.e. we get
an invalid FP exception if either argument is any NaN).
The condition code is implemented as a metadata string. The same set
of predicates as for the fcmp instruction is supported (except for the
"true" and "false" predicates).
These new intrinsics are mapped by SelectionDAG codegen onto two new
ISD opcodes, ISD::STRICT_FSETCC and ISD::STRICT_FSETCCS, again
representing quiet vs. signaling comparison operations. Otherwise
those nodes look like SETCC nodes, with an additional chain argument
and result as usual for strict FP nodes. The patch includes support
for the common legalization operations for those nodes.
The patch also includes full SystemZ back-end support for the new
ISD nodes, mapping them to all available SystemZ instruction to
fully implement strict semantics (scalar and vector).
Differential Revision: https://reviews.llvm.org/D69281
45 lines
1.6 KiB
LLVM
45 lines
1.6 KiB
LLVM
; Test f128 signaling comparisons on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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; There is no memory form of 128-bit comparison.
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define i64 @f1(i64 %a, i64 %b, fp128 *%ptr1, fp128 *%ptr2) #0 {
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; CHECK-LABEL: f1:
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; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r4)
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; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r5)
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; CHECK: wfkxb [[REG1]], [[REG2]]
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; CHECK-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%f1 = load fp128, fp128 *%ptr1
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%f2 = load fp128, fp128 *%ptr2
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%cond = call i1 @llvm.experimental.constrained.fcmps.f128(
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fp128 %f1, fp128 %f2,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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; Check comparison with zero -- it is not worthwhile to copy to
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; FP pairs just so we can use LTXBR, so simply load up a zero.
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define i64 @f2(i64 %a, i64 %b, fp128 *%ptr) #0 {
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; CHECK-LABEL: f2:
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; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r4)
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; CHECK-DAG: vzero [[REG2:%v[0-9]+]]
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; CHECK: wfkxb [[REG1]], [[REG2]]
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; CHECK-NEXT: locgrne %r2, %r3
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; CHECK: br %r14
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%f = load fp128, fp128 *%ptr
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%cond = call i1 @llvm.experimental.constrained.fcmps.f128(
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fp128 %f, fp128 0xL00000000000000000000000000000000,
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metadata !"oeq",
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metadata !"fpexcept.strict") #0
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%res = select i1 %cond, i64 %a, i64 %b
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ret i64 %res
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}
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attributes #0 = { strictfp }
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declare i1 @llvm.experimental.constrained.fcmps.f128(fp128, fp128, metadata, metadata)
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