..
Large
tests/CodeGen: Use %python lit substitution when invoking python
2021-07-06 18:46:36 -07:00
addr-01.ll
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
addr-02.ll
[DAG] Reassociate Add with Or
2021-07-07 10:21:07 +01:00
addr-03.ll
alias-01.ll
alloca-01.ll
alloca-02.ll
alloca-03.ll
alloca-04.ll
and-01.ll
and-02.ll
and-03.ll
and-04.ll
and-05.ll
and-06.ll
and-07.ll
and-08.ll
and-xor-01.ll
anyregcc-novec.ll
anyregcc-vec.ll
anyregcc.ll
args-01.ll
args-02.ll
args-03.ll
args-04.ll
args-05.ll
args-06.ll
args-07.ll
args-08.ll
args-09.ll
args-10.ll
args-11.ll
asm-01.ll
asm-02.ll
asm-03.ll
asm-04.ll
asm-05.ll
asm-06.ll
asm-07.ll
asm-08.ll
asm-09.ll
asm-10.ll
asm-11.ll
asm-12.ll
asm-13.ll
asm-14.ll
asm-15.ll
asm-16.ll
asm-17.ll
asm-18.ll
asm-19.ll
asm-20.ll
atomic-fence-01.ll
atomic-fence-02.ll
atomic-load-01.ll
atomic-load-02.ll
atomic-load-03.ll
atomic-load-04.ll
atomic-load-05.ll
atomic-store-01.ll
atomic-store-02.ll
atomic-store-03.ll
atomic-store-04.ll
atomic-store-05.ll
atomicrmw-add-01.ll
atomicrmw-add-02.ll
atomicrmw-add-03.ll
atomicrmw-add-04.ll
atomicrmw-add-05.ll
atomicrmw-add-06.ll
atomicrmw-and-01.ll
atomicrmw-and-02.ll
atomicrmw-and-03.ll
atomicrmw-and-04.ll
atomicrmw-and-05.ll
atomicrmw-and-06.ll
atomicrmw-minmax-01.ll
atomicrmw-minmax-02.ll
atomicrmw-minmax-03.ll
atomicrmw-minmax-04.ll
atomicrmw-nand-01.ll
atomicrmw-nand-02.ll
atomicrmw-nand-03.ll
atomicrmw-nand-04.ll
atomicrmw-or-01.ll
atomicrmw-or-02.ll
atomicrmw-or-03.ll
atomicrmw-or-04.ll
atomicrmw-or-05.ll
atomicrmw-or-06.ll
atomicrmw-sub-01.ll
atomicrmw-sub-02.ll
atomicrmw-sub-03.ll
atomicrmw-sub-04.ll
atomicrmw-sub-05.ll
atomicrmw-sub-06.ll
atomicrmw-xchg-01.ll
atomicrmw-xchg-02.ll
atomicrmw-xchg-03.ll
atomicrmw-xchg-04.ll
atomicrmw-xor-01.ll
atomicrmw-xor-02.ll
atomicrmw-xor-03.ll
atomicrmw-xor-04.ll
atomicrmw-xor-05.ll
atomicrmw-xor-06.ll
backchain.ll
bcmp.ll
branch-01.ll
branch-02.ll
branch-03.ll
branch-04.ll
branch-05.ll
branch-06.ll
branch-07.ll
branch-08.ll
branch-09.ll
branch-10.ll
branch-11.ll
branch-folder-hoist-livein.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
bswap-01.ll
bswap-02.ll
bswap-03.ll
bswap-04.ll
bswap-05.ll
bswap-06.ll
bswap-07.ll
bswap-08.ll
buildvector-00.ll
builtins.ll
call-01.ll
call-02.ll
call-03.ll
call-04.ll
call-05.ll
cc-liveness.ll
clear-liverange-spillreg.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cmpxchg-01.ll
cmpxchg-02.ll
cmpxchg-03.ll
cmpxchg-04.ll
cmpxchg-05.ll
cmpxchg-06.ll
codegenprepare-form-OF-ops.ll
codegenprepare-sink-and-for-tm.ll
[SystemZ] Return true from isMaskAndCmp0FoldingBeneficial().
2021-06-08 15:42:46 -05:00
codegenprepare-splitstore.ll
codemodel.ll
combine_loads_from_build_pair.ll
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cond-load-01.ll
cond-load-02.ll
cond-load-03.ll
cond-move-01.ll
cond-move-02.ll
cond-move-03.ll
cond-move-04.mir
cond-move-05.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cond-move-06.ll
cond-move-07.ll
cond-move-08.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cond-move-09.mir
cond-move-10.ll
cond-move-regalloc-hints-02.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cond-move-regalloc-hints.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
cond-store-01.ll
cond-store-02.ll
cond-store-03.ll
cond-store-04.ll
cond-store-05.ll
cond-store-06.ll
cond-store-07.ll
cond-store-08.ll
cond-store-09.ll
copy-physreg-128.ll
ctpop-01.ll
ctpop-02.ll
dag-combine-01.ll
dag-combine-02.ll
dag-combine-03.ll
dag-combine-04.ll
dag-combine-05.ll
DAGCombine_trunc_extract.ll
DAGCombiner_illegal_BUILD_VECTOR.ll
DAGCombiner_isAlias.ll
debuginstr-00.mir
debuginstr-01.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
debuginstr-02.mir
debuginstr-cgp.mir
dyn-alloca-offset.ll
expand-zext-pseudo.ll
extract-vector-elt-zEC12.ll
fentry-debug-info.ll
fentry-insertion.ll
fentry-no-reorder.ll
fold-memory-op-impl.ll
foldmemop-imm-01.ll
foldmemop-imm-02.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-msc.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-vec-binops.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-vec-cc.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-vec-cmp.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-vec-fusedfp.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
foldmemop-vec-unary.mir
fp-abs-01.ll
fp-abs-02.ll
fp-abs-03.ll
fp-abs-04.ll
fp-add-01.ll
fp-add-02.ll
fp-add-03.ll
fp-add-04.ll
fp-cmp-01.ll
fp-cmp-02.ll
fp-cmp-03.ll
fp-cmp-04.ll
fp-cmp-05.ll
fp-cmp-06.ll
fp-cmp-07.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
fp-const-01.ll
fp-const-02.ll
fp-const-03.ll
fp-const-04.ll
fp-const-05.ll
fp-const-06.ll
fp-const-07.ll
fp-const-08.ll
fp-const-09.ll
fp-const-10.ll
fp-const-11.ll
fp-const-12.ll
fp-conv-01.ll
fp-conv-02.ll
fp-conv-03.ll
fp-conv-04.ll
fp-conv-05.ll
fp-conv-06.ll
fp-conv-07.ll
fp-conv-08.ll
fp-conv-09.ll
fp-conv-10.ll
fp-conv-11.ll
fp-conv-12.ll
fp-conv-13.ll
fp-conv-14.ll
fp-conv-15.ll
fp-conv-16.ll
fp-conv-17.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
fp-conv-18.ll
fp-copysign-01.ll
fp-copysign-02.ll
fp-div-01.ll
fp-div-02.ll
fp-div-03.ll
fp-div-04.ll
fp-libcall.ll
Update @llvm.powi to handle different int sizes for the exponent
2021-06-17 09:38:28 +02:00
fp-move-01.ll
fp-move-02.ll
fp-move-03.ll
fp-move-04.ll
fp-move-05.ll
fp-move-06.ll
fp-move-07.ll
fp-move-08.ll
fp-move-09.ll
fp-move-10.ll
fp-move-11.ll
fp-move-12.ll
fp-move-13.ll
fp-mul-01.ll
fp-mul-02.ll
fp-mul-03.ll
fp-mul-04.ll
fp-mul-05.ll
fp-mul-06.ll
fp-mul-07.ll
fp-mul-08.ll
fp-mul-09.ll
fp-mul-10.ll
fp-mul-11.ll
fp-mul-12.ll
fp-mul-13.ll
fp-mul-14.ll
fp-neg-01.ll
fp-neg-02.ll
fp-round-01.ll
fp-round-02.ll
fp-round-03.ll
fp-sincos-01.ll
fp-sqrt-01.ll
fp-sqrt-02.ll
fp-sqrt-03.ll
fp-sqrt-04.ll
fp-strict-add-01.ll
fp-strict-add-02.ll
fp-strict-add-03.ll
fp-strict-add-04.ll
fp-strict-alias.ll
fp-strict-cmp-01.ll
fp-strict-cmp-02.ll
fp-strict-cmp-03.ll
fp-strict-cmp-04.ll
fp-strict-cmp-05.ll
fp-strict-cmp-06.ll
fp-strict-cmps-01.ll
fp-strict-cmps-02.ll
fp-strict-cmps-03.ll
fp-strict-cmps-04.ll
fp-strict-cmps-05.ll
fp-strict-cmps-06.ll
fp-strict-conv-01.ll
fp-strict-conv-02.ll
fp-strict-conv-03.ll
fp-strict-conv-04.ll
fp-strict-conv-05.ll
fp-strict-conv-06.ll
fp-strict-conv-07.ll
fp-strict-conv-08.ll
fp-strict-conv-09.ll
fp-strict-conv-10.ll
fp-strict-conv-11.ll
fp-strict-conv-12.ll
fp-strict-conv-13.ll
fp-strict-conv-14.ll
fp-strict-conv-15.ll
fp-strict-conv-16.ll
fp-strict-div-01.ll
fp-strict-div-02.ll
fp-strict-div-03.ll
fp-strict-div-04.ll
fp-strict-mul-01.ll
fp-strict-mul-02.ll
fp-strict-mul-03.ll
fp-strict-mul-04.ll
fp-strict-mul-05.ll
fp-strict-mul-06.ll
fp-strict-mul-07.ll
fp-strict-mul-08.ll
fp-strict-mul-09.ll
fp-strict-mul-10.ll
fp-strict-mul-11.ll
fp-strict-mul-12.ll
fp-strict-mul-13.ll
fp-strict-round-01.ll
fp-strict-round-02.ll
fp-strict-round-03.ll
fp-strict-sqrt-01.ll
fp-strict-sqrt-02.ll
fp-strict-sqrt-03.ll
fp-strict-sqrt-04.ll
fp-strict-sub-01.ll
fp-strict-sub-02.ll
fp-strict-sub-03.ll
fp-strict-sub-04.ll
fp-sub-01.ll
fp-sub-02.ll
fp-sub-03.ll
fp-sub-04.ll
fpc-intrinsics.ll
frame-01.ll
frame-02.ll
frame-03.ll
frame-04.ll
frame-05.ll
frame-06.ll
frame-07.ll
frame-08.ll
frame-09.ll
frame-10.ll
frame-11.ll
frame-13.ll
frame-14.ll
frame-15.ll
frame-16.ll
frame-17.ll
frame-18.ll
frame-19.ll
frame-20.ll
frame-21.ll
frame-22.ll
frame-23.ll
frame-24.ll
frame-25.ll
frame-26.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
frameaddr-01.ll
frameaddr-02.ll
function-attributes-01.ll
ghc-cc-01.ll
ghc-cc-02.ll
ghc-cc-03.ll
ghc-cc-04.ll
ghc-cc-05.ll
ghc-cc-06.ll
ghc-cc-07.ll
hoist-const-stores.ll
htm-intrinsics.ll
inline-asm-i128.ll
[SystemZ] Support the 'N' code for the odd register in inline-asm.
2021-07-06 19:46:49 +02:00
inline-asm-i-constraint-i1.ll
inlineasm-output-template.ll
insert-01.ll
insert-02.ll
insert-03.ll
insert-04.ll
insert-05.ll
insert-06.ll
int-abs-01.ll
int-add-01.ll
int-add-02.ll
int-add-03.ll
int-add-04.ll
int-add-05.ll
int-add-06.ll
int-add-07.ll
int-add-08.ll
int-add-09.ll
int-add-10.ll
int-add-11.ll
int-add-12.ll
int-add-13.ll
int-add-14.ll
int-add-15.ll
int-add-16.ll
int-add-17.ll
int-add-18.mir
int-cmp-01.ll
int-cmp-02.ll
int-cmp-03.ll
int-cmp-04.ll
int-cmp-05.ll
int-cmp-06.ll
int-cmp-07.ll
int-cmp-08.ll
int-cmp-09.ll
int-cmp-10.ll
int-cmp-11.ll
int-cmp-12.ll
int-cmp-13.ll
int-cmp-14.ll
int-cmp-15.ll
int-cmp-16.ll
int-cmp-17.ll
int-cmp-18.ll
int-cmp-19.ll
int-cmp-20.ll
int-cmp-21.ll
int-cmp-22.ll
int-cmp-23.ll
int-cmp-24.ll
int-cmp-25.ll
int-cmp-26.ll
int-cmp-27.ll
int-cmp-28.ll
int-cmp-29.ll
int-cmp-30.ll
int-cmp-31.ll
int-cmp-32.ll
int-cmp-33.ll
int-cmp-34.ll
int-cmp-35.ll
int-cmp-36.ll
int-cmp-37.ll
int-cmp-38.ll
int-cmp-39.ll
int-cmp-40.ll
int-cmp-41.ll
int-cmp-42.ll
int-cmp-43.ll
int-cmp-44.ll
int-cmp-45.ll
int-cmp-46.ll
int-cmp-47.ll
int-cmp-48.ll
int-cmp-49.ll
int-cmp-50.ll
int-cmp-51.ll
int-cmp-52.ll
int-cmp-53.ll
int-cmp-54.ll
int-cmp-55.ll
int-cmp-56.ll
int-cmp-56.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
int-cmp-57.ll
int-cmp-58.mir
int-cmp-59.ll
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
int-cmp-60.ll
int-cmp-61.ll
[SystemZ] Return true from convertSetCCLogicToBitwiseLogic for scalar integer.
2021-06-08 16:27:28 -05:00
int-const-01.ll
int-const-02.ll
int-const-03.ll
int-const-04.ll
int-const-05.ll
int-const-06.ll
int-conv-01.ll
int-conv-02.ll
int-conv-03.ll
int-conv-04.ll
int-conv-05.ll
int-conv-06.ll
int-conv-07.ll
int-conv-08.ll
int-conv-09.ll
int-conv-10.ll
int-conv-11.ll
int-conv-12.ll
int-conv-13.ll
int-div-01.ll
int-div-02.ll
int-div-03.ll
int-div-04.ll
int-div-05.ll
int-div-06.ll
int-move-01.ll
int-move-02.ll
int-move-03.ll
int-move-04.ll
int-move-05.ll
int-move-06.ll
int-move-07.ll
int-move-08.ll
int-move-09.ll
int-move-10.ll
int-mul-01.ll
int-mul-02.ll
int-mul-03.ll
int-mul-04.ll
int-mul-05.ll
int-mul-06.ll
int-mul-07.ll
int-mul-08.ll
int-mul-09.ll
int-mul-10.ll
int-mul-11.ll
int-neg-01.ll
int-neg-02.ll
int-sadd-01.ll
int-sadd-02.ll
int-sadd-03.ll
int-sadd-04.ll
int-sadd-05.ll
int-sadd-06.ll
int-sadd-07.ll
int-sadd-08.ll
int-sadd-09.ll
int-ssub-01.ll
int-ssub-02.ll
int-ssub-03.ll
int-ssub-04.ll
int-ssub-05.ll
int-ssub-06.ll
int-ssub-07.ll
int-ssub-08.ll
int-ssub-09.ll
int-sub-01.ll
int-sub-02.ll
int-sub-03.ll
int-sub-04.ll
int-sub-05.ll
int-sub-06.ll
int-sub-07.ll
int-sub-08.ll
int-sub-09.ll
int-sub-10.ll
int-sub-11.ll
int-uadd-01.ll
int-uadd-02.ll
int-uadd-03.ll
int-uadd-04.ll
int-uadd-05.ll
int-uadd-06.ll
int-uadd-07.ll
int-uadd-08.ll
int-uadd-09.ll
int-uadd-10.ll
int-uadd-11.ll
int-uadd-12.ll
int-usub-01.ll
int-usub-02.ll
int-usub-03.ll
int-usub-04.ll
int-usub-05.ll
int-usub-06.ll
int-usub-07.ll
int-usub-08.ll
int-usub-09.ll
int-usub-10.ll
int-usub-11.ll
ipra-04.ll
ipra.ll
isel-debug.ll
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
knownbits-intrinsics-binop.ll
knownbits-intrinsics-unpack.ll
knownbits.ll
la-01.ll
la-02.ll
la-03.ll
la-04.ll
la-05.ll
list-ilp-crash.ll
lit.local.cfg
load-and-test-RA-hints.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
load-and-test.mir
locr-legal-regclass.ll
loop-01.ll
loop-02.ll
loop-03.ll
loop-04.ll
lower-copy-undef-src.mir
mature-mc-support.ll
memchr-01.ll
memchr-nobuiltin.ll
memcmp-01.ll
memcmp-02.ll
memcmp-nobuiltin.ll
memcpy-01.ll
memcpy-02.ll
memset-01.ll
memset-02.ll
memset-03.ll
memset-04.ll
memset-05.ll
[SystemZ] Generate XC loop for memset 0 of variable length.
2021-07-06 18:07:31 +02:00
misched-cutoff.ll
misched-readadvances.mir
mnop-mcount-01.ll
mnop-mcount-02.ll
mrecord-mcount-01.ll
mrecord-mcount-02.ll
multiselect-02.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
multiselect.ll
mverify-optypes.mir
no-postra-sink.mir
no-vx.ll
nomerge.ll
not-01.ll
or-01.ll
or-02.ll
or-03.ll
or-04.ll
or-05.ll
or-06.ll
or-07.ll
or-08.ll
patchpoint-invoke.ll
patchpoint.ll
pie.ll
postra-sched-expandedops.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
pr31710.ll
pr32372.ll
pr32505.ll
pr36164.ll
pr42512.ll
pr42606.ll
pr47019.ll
prefetch-01.ll
prefetch-02.ll
prefetch-03.ll
prefetch-04.ll
RAbasic-invalid-LR-update.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
regalloc-fast-invalid-kill-flag.mir
regalloc-GR128-02.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
regalloc-GR128.ll
regcoal_remat_empty_subrange.ll
regcoal-subranges-update-remat.mir
regcoal-subranges-update.mir
regcoal-undef-lane-4-rm-cp-commuting-def.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
ret-addr-01.ll
risbg-01.ll
risbg-02.ll
risbg-03.ll
risbg-04.ll
rnsbg-01.ll
rosbg-01.ll
rosbg-02.ll
rot-01.ll
rot-02.ll
rot-shift-64-sub-amt.ll
rxsbg-01.ll
scalar-ctlz.ll
selectcc-01.ll
selectcc-02.ll
selectcc-03.ll
selectcc-04.ll
setcc-01.ll
setcc-02.ll
setcc-03.ll
setcc-04.ll
sext-zext.ll
shift-01.ll
shift-02.ll
shift-03.ll
shift-04.ll
shift-05.ll
shift-06.ll
shift-07.ll
shift-08.ll
shift-09.ll
shift-10.ll
shift-11.ll
shift-12.ll
shorten-fused-fp-ops.mir
signbits-intrinsics-binop.ll
signbits-intrinsics-unpack.ll
signbits.ll
soft-float-01.ll
soft-float-02.ll
soft-float-03.ll
soft-float-04.ll
soft-float-args.ll
soft-float-inline-asm-01.ll
soft-float-inline-asm-02.ll
soft-float-inline-asm-03.ll
soft-float-inline-asm-04.ll
spill-01.ll
splitMove_undefReg_mverifier_2.ll
splitMove_undefReg_mverifier.ll
stack-clash-dynamic-alloca.ll
stack-clash-protection.ll
stack-guard.ll
stack-size-section.ll
stackmap-nops.ll
stackmap-shadow-optimization.ll
stackmap.ll
stackpointer.ll
store_nonbytesized_vecs.ll
strcmp-01.ll
strcmp-nobuiltin.ll
strcpy-01.ll
strcpy-nobuiltin.ll
strlen-01.ll
strlen-nobuiltin.ll
subregliveness-01.ll
subregliveness-02.ll
subregliveness-03.ll
subregliveness-04.ll
subregliveness-05.ll
subregliveness-06.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
subregliveness-07.mir
CodeGen: Print/parse LLTs in MachineMemOperands
2021-06-30 16:54:13 -04:00
swift-return.ll
swifterror.ll
swiftself.ll
tail-call-mem-intrinsics.ll
tdc-01.ll
tdc-02.ll
tdc-03.ll
tdc-04.ll
tdc-05.ll
tdc-06.ll
tdc-07.ll
tls-01.ll
tls-02.ll
tls-03.ll
tls-04.ll
tls-05.ll
tls-06.ll
tls-07.ll
tls-08.ll
tls-09.ll
tls-10.mir
tls-11.mir
trap-01.ll
trap-02.ll
trap-03.ll
trap-04.ll
trap-05.ll
twoaddr-sink.ll
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[DAGCombine] Poison-prove scalarizeExtractedVectorLoad.
2021-05-30 11:40:55 +01:00
vec-intrinsics-01.ll
vec-intrinsics-02.ll
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vector-constrained-fp-intrinsics.ll
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xor-04.ll
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xor-06.ll
xor-07.ll
xor-08.ll
