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3203edf16f
Improve/implement these methods to improve DAG combining. This mainly concerns intrinsics. Some constant operands to SystemZISD nodes have been marked Opaque to avoid transforming back and forth between generic and target nodes infinitely. Review: Ulrich Weigand llvm-svn: 327765
237 lines
8.1 KiB
LLVM
237 lines
8.1 KiB
LLVM
; Test that DAGCombiner gets helped by ComputeNumSignBitsForTargetNode() with
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; vector intrinsics.
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;
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
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declare {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16>, <8 x i16>)
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declare {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32>, <4 x i32>)
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declare {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64>, <2 x i64>)
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; PACKS_CC: i64 -> i32
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define <4 x i32> @f0() {
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; CHECK-LABEL: f0:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpksgs %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> <i64 0, i64 1>, <2 x i64> <i64 0, i64 1>)
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%extr = extractvalue {<4 x i32>, i32} %call, 0
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%trunc = trunc <4 x i32> %extr to <4 x i16>
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%ret = sext <4 x i16> %trunc to <4 x i32>
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ret <4 x i32> %ret
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}
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; PACKS_CC: i32 -> i16
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define <8 x i16> @f1() {
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; CHECK-LABEL: f1:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpksfs %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> <i32 0, i32 1, i32 1, i32 0>,
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<4 x i32> <i32 0, i32 1, i32 1, i32 0>)
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%extr = extractvalue {<8 x i16>, i32} %call, 0
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%trunc = trunc <8 x i16> %extr to <8 x i8>
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%ret = sext <8 x i8> %trunc to <8 x i16>
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ret <8 x i16> %ret
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}
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; PACKS_CC: i16 -> i8
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define <16 x i8> @f2() {
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; CHECK-LABEL: f2:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpkshs %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call {<16 x i8>, i32} @llvm.s390.vpkshs(
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>,
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>)
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%extr = extractvalue {<16 x i8>, i32} %call, 0
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%trunc = trunc <16 x i8> %extr to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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declare {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16>, <8 x i16>)
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declare {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32>, <4 x i32>)
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declare {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64>, <2 x i64>)
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; PACKLS_CC: i64 -> i32
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define <4 x i32> @f3() {
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; CHECK-LABEL: f3:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklsgs %v24, %v1, %v0
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; CHECK-NEXT: br %r14
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%call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> <i64 0, i64 1>, <2 x i64> <i64 1, i64 0>)
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%extr = extractvalue {<4 x i32>, i32} %call, 0
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%trunc = trunc <4 x i32> %extr to <4 x i16>
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%ret = sext <4 x i16> %trunc to <4 x i32>
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ret <4 x i32> %ret
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}
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; PACKLS_CC: i32 -> i16
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define <8 x i16> @f4() {
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; CHECK-LABEL: f4:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklsfs %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> <i32 0, i32 1, i32 1, i32 0>,
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<4 x i32> <i32 0, i32 1, i32 1, i32 0>)
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%extr = extractvalue {<8 x i16>, i32} %call, 0
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%trunc = trunc <8 x i16> %extr to <8 x i8>
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%ret = sext <8 x i8> %trunc to <8 x i16>
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ret <8 x i16> %ret
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}
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; PACKLS_CC: i16 -> i8
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define <16 x i8> @f5() {
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; CHECK-LABEL: f5:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklshs %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call {<16 x i8>, i32} @llvm.s390.vpklshs(
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>,
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>)
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%extr = extractvalue {<16 x i8>, i32} %call, 0
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%trunc = trunc <16 x i8> %extr to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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declare <16 x i8> @llvm.s390.vpksh(<8 x i16>, <8 x i16>)
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declare <8 x i16> @llvm.s390.vpksf(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.s390.vpksg(<2 x i64>, <2 x i64>)
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; PACKS: i64 -> i32
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define <4 x i32> @f6() {
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; CHECK-LABEL: f6:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpksg %v24, %v1, %v0
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; CHECK-NEXT: br %r14
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%call = call <4 x i32> @llvm.s390.vpksg(<2 x i64> <i64 0, i64 1>, <2 x i64> <i64 1, i64 0>)
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%trunc = trunc <4 x i32> %call to <4 x i16>
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%ret = sext <4 x i16> %trunc to <4 x i32>
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ret <4 x i32> %ret
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}
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; PACKS: i32 -> i16
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define <8 x i16> @f7() {
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; CHECK-LABEL: f7:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpksf %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call <8 x i16> @llvm.s390.vpksf(<4 x i32> <i32 0, i32 1, i32 1, i32 0>,
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<4 x i32> <i32 0, i32 1, i32 1, i32 0>)
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%trunc = trunc <8 x i16> %call to <8 x i8>
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%ret = sext <8 x i8> %trunc to <8 x i16>
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ret <8 x i16> %ret
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}
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; PACKS: i16 -> i8
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define <16 x i8> @f8() {
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; CHECK-LABEL: f8:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpksh %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call <16 x i8> @llvm.s390.vpksh(
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>,
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>)
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%trunc = trunc <16 x i8> %call to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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declare <16 x i8> @llvm.s390.vpklsh(<8 x i16>, <8 x i16>)
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declare <8 x i16> @llvm.s390.vpklsf(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.s390.vpklsg(<2 x i64>, <2 x i64>)
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; PACKLS: i64 -> i32
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define <4 x i32> @f9() {
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; CHECK-LABEL: f9:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklsg %v24, %v1, %v0
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; CHECK-NEXT: br %r14
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%call = call <4 x i32> @llvm.s390.vpklsg(<2 x i64> <i64 0, i64 1>, <2 x i64> <i64 1, i64 0>)
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%trunc = trunc <4 x i32> %call to <4 x i16>
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%ret = sext <4 x i16> %trunc to <4 x i32>
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ret <4 x i32> %ret
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}
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; PACKLS: i32 -> i16
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define <8 x i16> @f10() {
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; CHECK-LABEL: f10:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklsf %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call <8 x i16> @llvm.s390.vpklsf(<4 x i32> <i32 0, i32 1, i32 1, i32 0>,
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<4 x i32> <i32 0, i32 1, i32 1, i32 0>)
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%trunc = trunc <8 x i16> %call to <8 x i8>
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%ret = sext <8 x i8> %trunc to <8 x i16>
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ret <8 x i16> %ret
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}
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; PACKLS: i16 -> i8
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define <16 x i8> @f11() {
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; CHECK-LABEL: f11:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpklsh %v24, %v0, %v0
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; CHECK-NEXT: br %r14
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%call = call <16 x i8> @llvm.s390.vpklsh(
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>,
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<8 x i16> <i16 0, i16 0, i16 1, i16 1, i16 0, i16 0, i16 1, i16 1>)
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%trunc = trunc <16 x i8> %call to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32)
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; VPDI:
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define <2 x i64> @f12() {
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; CHECK-LABEL: f12:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vpdi %v24, %v1, %v0, 0
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; CHECK-NEXT: br %r14
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%perm = call <2 x i64> @llvm.s390.vpdi(<2 x i64> <i64 0, i64 1>,
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<2 x i64> <i64 1, i64 0>, i32 0)
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%trunc = trunc <2 x i64> %perm to <2 x i32>
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%ret = sext <2 x i32> %trunc to <2 x i64>
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ret <2 x i64> %ret
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}
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declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32)
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; VSLDB:
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define <16 x i8> @f13() {
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; CHECK-LABEL: f13:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vsldb %v24, %v0, %v0, 1
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; CHECK-NEXT: br %r14
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%shfd = call <16 x i8> @llvm.s390.vsldb(<16 x i8>
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<i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1>, <16 x i8>
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<i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1>,
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i32 1)
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%trunc = trunc <16 x i8> %shfd to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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declare <16 x i8> @llvm.s390.vperm(<16 x i8>, <16 x i8>, <16 x i8>)
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; Test VPERM:
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define <16 x i8> @f14() {
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; CHECK-LABEL: f14:
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; CHECK-LABEL: # %bb.0:
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; CHECK: vperm %v24, %v0, %v0, %v0
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; CHECK-NEXT: br %r14
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%perm = call <16 x i8> @llvm.s390.vperm(
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<16 x i8> <i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1>,
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<16 x i8> <i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1>,
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<16 x i8> <i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1,
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i8 0, i8 0, i8 1, i8 1, i8 0, i8 1, i8 1, i8 1>)
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%trunc = trunc <16 x i8> %perm to <16 x i4>
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%ret = sext <16 x i4> %trunc to <16 x i8>
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ret <16 x i8> %ret
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}
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