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llvm-mirror/lib/CodeGen/SelectionDAG
Eli Friedman 3cc7de085d [CodeGen] Fix result type for SMULO/UMULO legalization
On some platforms (like MSP430) the second element of the result
structure for SMULO/UMULO may have a shorter type than the one
returned by SetCC. We need to truncate it to the right type, or
else some incorrect code may be generated later on.

This fixes issue https://github.com/rust-lang/rust/issues/37829

Patch by Vadzim Dambrouski!

Differential Revision: https://reviews.llvm.org/D27154

llvm-svn: 288857
2016-12-06 22:49:36 +00:00
..
CMakeLists.txt [CMake] NFC. Updating CMake dependency specifications 2016-11-17 04:36:50 +00:00
DAGCombiner.cpp [DAGCombine] Add (sext_in_reg (zext x)) -> (sext x) combine 2016-12-06 19:09:37 +00:00
FastISel.cpp IR: Change the gep_type_iterator API to avoid always exposing the "current" type. 2016-12-02 02:24:42 +00:00
FunctionLoweringInfo.cpp Move most EH from MachineModuleInfo to MachineFunction 2016-12-01 19:32:15 +00:00
InstrEmitter.cpp SDAG: Make sure we use an allocatable reg class when we create this vreg 2016-10-28 22:42:54 +00:00
InstrEmitter.h Pass DebugLoc and SDLoc by const ref. 2016-06-12 15:39:02 +00:00
LegalizeDAG.cpp [CodeGen] Fix result type for SMULO/UMULO legalization 2016-12-06 22:49:36 +00:00
LegalizeFloatTypes.cpp [CodeGen] Split out the notions of MI invariance and MI dereferenceability. 2016-09-11 01:38:58 +00:00
LegalizeIntegerTypes.cpp Integer legalization: fix MUL expansion 2016-11-15 18:29:24 +00:00
LegalizeTypes.cpp SDAG: Avoid a large, usually empty SmallVector in a recursive function 2016-12-02 00:11:01 +00:00
LegalizeTypes.h [SelectionDAGBuilder] Support llvm.flt.rounds on targets where i32 is not legal 2016-10-10 20:45:15 +00:00
LegalizeTypesGeneric.cpp Do not assume that FP vector operands are never legalized by expanding 2016-10-26 19:51:35 +00:00
LegalizeVectorOps.cpp [VectorLegalizer] Remove EVT::getSizeInBits code duplications. NFCI. 2016-11-21 18:24:44 +00:00
LegalizeVectorTypes.cpp Type legalization for compressstore and expandload intrinsics. 2016-11-23 13:58:24 +00:00
LLVMBuild.txt
ResourcePriorityQueue.cpp Use the range variant of find instead of unpacking begin/end 2016-08-11 22:21:41 +00:00
ScheduleDAGFast.cpp Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
ScheduleDAGRRList.cpp Use the range variant of find instead of unpacking begin/end 2016-08-11 22:21:41 +00:00
ScheduleDAGSDNodes.cpp SelectionDAG: Avoid implicit iterator conversions in ScheduleDAGSDNodes, NFC 2016-07-08 19:07:09 +00:00
ScheduleDAGSDNodes.h [SelectionDAG] Remove dead code. NFC. 2015-10-15 17:54:06 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h Apply clang-tidy's misc-move-constructor-init throughout LLVM. 2016-05-27 14:27:24 +00:00
SelectionDAG.cpp [SelectionDAG] We can ignore knownbits from an undef shuffle vector index if we don't actually demand that element 2016-12-06 18:58:25 +00:00
SelectionDAGBuilder.cpp IR: Change the gep_type_iterator API to avoid always exposing the "current" type. 2016-12-02 02:24:42 +00:00
SelectionDAGBuilder.h Expandload and Compressstore intrinsics 2016-11-03 03:23:55 +00:00
SelectionDAGDumper.cpp Create llvm.addressofreturnaddress intrinsic 2016-10-12 22:13:19 +00:00
SelectionDAGISel.cpp Move most EH from MachineModuleInfo to MachineFunction 2016-12-01 19:32:15 +00:00
SelectionDAGPrinter.cpp Make the SelectionDAG graph printer use SDNode::PersistentId labels. 2015-10-27 23:09:03 +00:00
SelectionDAGTargetInfo.cpp Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/ 2016-01-27 16:32:26 +00:00
StatepointLowering.cpp Fix spelling mistakes in SelectionDAG comments. NFC. 2016-11-20 13:14:57 +00:00
StatepointLowering.h [NFC] Header cleanup 2016-04-18 09:17:29 +00:00
TargetLowering.cpp [TargetLowering] add special-case for demanded bits analysis of 'not' 2016-12-05 15:58:21 +00:00