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a502a514d2
This patch introduces a pass that uses the Attributor to deduce AMDGPU specific attributes. Reviewed By: jdoerfert, arsenm Differential Revision: https://reviews.llvm.org/D104997
70 lines
3.7 KiB
LLVM
70 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-annotate-kernel-features %s | FileCheck -check-prefixes=GCN,AKF_GCN %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-attributor %s | FileCheck -check-prefixes=GCN,ATTRIBUTOR_GCN %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
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target datalayout = "A5"
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; GFX9-LABEL: {{^}}indirect:
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define internal void @indirect() {
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; GCN-LABEL: define {{[^@]+}}@indirect
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; GCN-SAME: () #[[ATTR0:[0-9]+]] {
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; GCN-NEXT: ret void
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;
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ret void
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}
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; GFX9-LABEL: {{^}}test_simple_indirect_call:
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; GFX9: s_add_u32 flat_scratch_lo, s12, s17
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; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s13, 0
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; GFX9-NEXT: s_mov_b32 s13, s15
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; GFX9-NEXT: s_mov_b32 s12, s14
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; GFX9-NEXT: s_load_dwordx2 s[14:15], s[4:5], 0x4
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; GFX9-NEXT: s_add_u32 s0, s0, s17
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; GFX9-NEXT: s_addc_u32 s1, s1, 0
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; GFX9-NEXT: s_mov_b32 s32, 0
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; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9-NEXT: s_lshr_b32 s14, s14, 16
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; GFX9-NEXT: s_mul_i32 s14, s14, s15
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; GFX9-NEXT: v_mul_lo_u32 v3, s14, v0
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; GFX9-NEXT: s_getpc_b64 s[18:19]
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; GFX9-NEXT: s_add_u32 s18, s18, indirect@rel32@lo+4
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; GFX9-NEXT: s_addc_u32 s19, s19, indirect@rel32@hi+12
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; GFX9-NEXT: s_mov_b32 s14, s16
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; GFX9-NEXT: v_mad_u32_u24 v3, v1, s15, v3
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; GFX9-NEXT: v_add_lshl_u32 v5, v3, v2, 3
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; GFX9-NEXT: v_mov_b32_e32 v3, s18
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; GFX9-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; GFX9-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; GFX9-NEXT: v_mov_b32_e32 v4, s19
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; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2
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; GFX9-NEXT: ds_write_b64 v5, v[3:4]
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; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
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; GFX9-NEXT: s_endpgm
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define amdgpu_kernel void @test_simple_indirect_call() {
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; GCN-LABEL: define {{[^@]+}}@test_simple_indirect_call
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; GCN-SAME: () #[[ATTR1:[0-9]+]] {
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; GCN-NEXT: [[FPTR:%.*]] = alloca void ()*, align 8, addrspace(5)
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; GCN-NEXT: [[FPTR_CAST:%.*]] = addrspacecast void ()* addrspace(5)* [[FPTR]] to void ()**
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; GCN-NEXT: store void ()* @indirect, void ()** [[FPTR_CAST]], align 8
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; GCN-NEXT: [[FP:%.*]] = load void ()*, void ()** [[FPTR_CAST]], align 8
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; GCN-NEXT: call void [[FP]]()
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; GCN-NEXT: ret void
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;
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%fptr = alloca void()*, addrspace(5)
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%fptr.cast = addrspacecast void()* addrspace(5)* %fptr to void()**
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store void()* @indirect, void()** %fptr.cast
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%fp = load void()*, void()** %fptr.cast
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call void %fp()
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ret void
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}
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;.
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; AKF_GCN: attributes #[[ATTR0]] = { "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-queue-ptr" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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; AKF_GCN: attributes #[[ATTR1]] = { "amdgpu-calls" "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-queue-ptr" "amdgpu-stack-objects" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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;.
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; ATTRIBUTOR_GCN: attributes #[[ATTR0]] = { "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-queue-ptr" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" "uniform-work-group-size"="false" }
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; ATTRIBUTOR_GCN: attributes #[[ATTR1]] = { "amdgpu-calls" "amdgpu-dispatch-id" "amdgpu-dispatch-ptr" "amdgpu-implicitarg-ptr" "amdgpu-queue-ptr" "amdgpu-stack-objects" "amdgpu-work-group-id-x" "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-x" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" "uniform-work-group-size"="false" }
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;.
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