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952753b931
The new addressing mode added for the v8.2A FP16 instructions uses bit 8 of the immediate to encode the sign of the offset, like the other FP loads/stores, so need to be treated the same way. Differential revision: https://reviews.llvm.org/D58816 llvm-svn: 355201
23 lines
797 B
LLVM
23 lines
797 B
LLVM
; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16 | FileCheck %s
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; RUN: llc < %s -mtriple armv8a--none-eabi -mattr=+fullfp16,+thumb-mode | FileCheck %s
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; Check that frame lowering for the fp16 instructions works correctly with
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; negative offsets (which happens when using the frame pointer).
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define void @foo(i32 %count) {
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entry:
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%half_alloca = alloca half, align 2
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; CHECK: vstr.16 {{s[0-9]+}}, [{{r[0-9]+}}, #-10]
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store half 0.0, half* %half_alloca
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call void @bar(half* %half_alloca)
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; A variable-sized alloca to force the above store to use the frame pointer
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; instead of the stack pointer, and so need a negative offset.
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%var_alloca = alloca i32, i32 %count
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call void @baz(i32* %var_alloca)
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ret void
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}
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declare void @bar(half*)
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declare void @baz(i32*)
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