Sanjay Patel ea5cc7e72d [x86] use BMI 'andn' for logic + compare ops ... With BMI, we can use 'andn' to save an instruction when the result is only used in a compare. This is related to one of the potential sequences to check 'isfinite' in: https://llvm.org/bugs/show_bug.cgi?id=27164 Differential Revision: http://reviews.llvm.org/D18910 llvm-svn: 265875		2016-04-09 16:02:52 +00:00
..
CMakeLists.txt	Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/	2016-01-27 16:32:26 +00:00
DAGCombiner.cpp	Fix Load Control Dependence in MemCpy Generation	2016-04-08 19:44:40 +00:00
FastISel.cpp	Swift Calling Convention: swifterror target-independent change.	2016-04-05 18:13:16 +00:00
FunctionLoweringInfo.cpp	Swift Calling Convention: swifterror target-independent change.	2016-04-05 18:13:16 +00:00
InstrEmitter.cpp	[X86] Part 1 to fix x86-64 fp128 calling convention.	2015-12-03 22:02:40 +00:00
InstrEmitter.h	Minor code cleanup. NFC.	2016-03-26 06:04:55 +00:00
LegalizeDAG.cpp	LegalizeDAG: Don't replace vector store with integer if not legal	2016-03-30 21:15:18 +00:00
LegalizeFloatTypes.cpp	Do not try to use i8 and i16 versions of FP_TO_U/SINT soft float library calls	2015-12-15 12:55:50 +00:00
LegalizeIntegerTypes.cpp	Remove unsafe AssertZext after promoting result of FP_TO_FP16	2016-03-24 14:06:03 +00:00
LegalizeTypes.cpp	Revert "[mips] Promote the result of SETCC nodes to GPR width."	2016-03-01 20:25:43 +00:00
LegalizeTypes.h	[X86][SSE] Reapplied: Simplify vector LOAD + EXTEND on pre-SSE41 hardware	2016-03-22 16:22:08 +00:00
LegalizeTypesGeneric.cpp	[X86] Part 1 to fix x86-64 fp128 calling convention.	2015-12-03 22:02:40 +00:00
LegalizeVectorOps.cpp	LegalizeDAG: Don't replace vector store with integer if not legal	2016-03-30 21:15:18 +00:00
LegalizeVectorTypes.cpp	[X86][SSE] Reapplied: Simplify vector LOAD + EXTEND on pre-SSE41 hardware	2016-03-22 16:22:08 +00:00
LLVMBuild.txt
ResourcePriorityQueue.cpp	Fix some comment typos.	2015-08-08 18:27:36 +00:00
ScheduleDAGFast.cpp	Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.	2015-12-05 07:13:35 +00:00
ScheduleDAGRRList.cpp	rangify; NFCI	2016-02-03 22:44:14 +00:00
ScheduleDAGSDNodes.cpp	Avoid overly large SmallPtrSet/SmallSet	2016-01-30 01:24:31 +00:00
ScheduleDAGSDNodes.h	[SelectionDAG] Remove dead code. NFC.	2015-10-15 17:54:06 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SelectionDAG.cpp	[x86] use BMI 'andn' for logic + compare ops	2016-04-09 16:02:52 +00:00
SelectionDAGBuilder.cpp	[SSP] Remove llvm.stackprotectorcheck.	2016-04-08 21:26:31 +00:00
SelectionDAGBuilder.h	[SSP] Remove llvm.stackprotectorcheck.	2016-04-08 21:26:31 +00:00
SelectionDAGDumper.cpp	Avoid overly large SmallPtrSet/SmallSet	2016-01-30 01:24:31 +00:00
SelectionDAGISel.cpp	[SSP] Remove llvm.stackprotectorcheck.	2016-04-08 21:26:31 +00:00
SelectionDAGPrinter.cpp	Make the SelectionDAG graph printer use SDNode::PersistentId labels.	2015-10-27 23:09:03 +00:00
SelectionDAGTargetInfo.cpp	Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/	2016-01-27 16:32:26 +00:00
StatepointLowering.cpp	Lower @llvm.experimental.deoptimize as a noreturn call	2016-04-06 01:33:49 +00:00
StatepointLowering.h	[StatepointLowering] Don't do two DenseMap lookups; nfci	2016-03-23 02:24:15 +00:00
TargetLowering.cpp	Swift Calling Convention: add swifterror attribute.	2016-04-01 21:41:15 +00:00